1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (C) 2018 Marvell International Ltd. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * https://spdx.org/licenses 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #ifndef MARVELL_PLAT_PRIV_H 9*91f16700Schasinglulu #define MARVELL_PLAT_PRIV_H 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <lib/utils.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu /***************************************************************************** 14*91f16700Schasinglulu * Function and variable prototypes 15*91f16700Schasinglulu ***************************************************************************** 16*91f16700Schasinglulu */ 17*91f16700Schasinglulu void plat_delay_timer_init(void); 18*91f16700Schasinglulu 19*91f16700Schasinglulu uint64_t mvebu_get_dram_size(uint64_t ap_base_addr); 20*91f16700Schasinglulu 21*91f16700Schasinglulu /* 22*91f16700Schasinglulu * GIC operation, mandatory functions required in Marvell standard platforms 23*91f16700Schasinglulu */ 24*91f16700Schasinglulu void plat_marvell_gic_driver_init(void); 25*91f16700Schasinglulu void plat_marvell_gic_init(void); 26*91f16700Schasinglulu void plat_marvell_gic_cpuif_enable(void); 27*91f16700Schasinglulu void plat_marvell_gic_cpuif_disable(void); 28*91f16700Schasinglulu void plat_marvell_gic_pcpu_init(void); 29*91f16700Schasinglulu void plat_marvell_gic_irq_save(void); 30*91f16700Schasinglulu void plat_marvell_gic_irq_restore(void); 31*91f16700Schasinglulu void plat_marvell_gic_irq_pcpu_save(void); 32*91f16700Schasinglulu void plat_marvell_gic_irq_pcpu_restore(void); 33*91f16700Schasinglulu 34*91f16700Schasinglulu #endif /* MARVELL_PLAT_PRIV_H */ 35