xref: /arm-trusted-firmware/include/plat/marvell/armada/a8k/common/efuse_def.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (C) 2021 Marvell International Ltd.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier:     BSD-3-Clause
5*91f16700Schasinglulu  * https://spdx.org/licenses
6*91f16700Schasinglulu  */
7*91f16700Schasinglulu 
8*91f16700Schasinglulu #ifndef EFUSE_DEF_H
9*91f16700Schasinglulu #define EFUSE_DEF_H
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <platform_def.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu #define MVEBU_AP_EFUSE_SRV_CTRL_REG	(MVEBU_AP_GEN_MGMT_BASE + 0x8)
14*91f16700Schasinglulu #define EFUSE_SRV_CTRL_LD_SELECT_OFFS	6
15*91f16700Schasinglulu #define EFUSE_SRV_CTRL_LD_SELECT_MASK	(1 << EFUSE_SRV_CTRL_LD_SELECT_OFFS)
16*91f16700Schasinglulu 
17*91f16700Schasinglulu #define MVEBU_AP_LD_EFUSE_BASE		(MVEBU_AP_GEN_MGMT_BASE + 0xF00)
18*91f16700Schasinglulu /* Bits [31:0] - 32 data bits total */
19*91f16700Schasinglulu #define MVEBU_AP_LDX_31_0_EFUSE_OFFS	(MVEBU_AP_LD_EFUSE_BASE)
20*91f16700Schasinglulu /* Bits [62:32] - 31 data bits total 32nd bit is parity for bits [62:0]*/
21*91f16700Schasinglulu #define MVEBU_AP_LDX_62_32_EFUSE_OFFS	(MVEBU_AP_LD_EFUSE_BASE + 0x4)
22*91f16700Schasinglulu /* Bits [94:63] - 32 data bits total */
23*91f16700Schasinglulu #define MVEBU_AP_LDX_94_63_EFUSE_OFFS	(MVEBU_AP_LD_EFUSE_BASE + 0x8)
24*91f16700Schasinglulu /* Bits [125:95] - 31 data bits total, 32nd bit is parity for bits [125:63] */
25*91f16700Schasinglulu #define MVEBU_AP_LDX_125_95_EFUSE_OFFS	(MVEBU_AP_LD_EFUSE_BASE + 0xC)
26*91f16700Schasinglulu /* Bits [157:126] - 32 data bits total */
27*91f16700Schasinglulu #define MVEBU_AP_LDX_126_157_EFUSE_OFFS	(MVEBU_AP_LD_EFUSE_BASE + 0x10)
28*91f16700Schasinglulu /* Bits [188:158] - 31 data bits total, 32nd bit is parity for bits [188:126] */
29*91f16700Schasinglulu #define MVEBU_AP_LDX_188_158_EFUSE_OFFS	(MVEBU_AP_LD_EFUSE_BASE + 0x14)
30*91f16700Schasinglulu /* Bits [220:189] - 32 data bits total */
31*91f16700Schasinglulu #define MVEBU_AP_LDX_220_189_EFUSE_OFFS	(MVEBU_AP_LD_EFUSE_BASE + 0x18)
32*91f16700Schasinglulu 
33*91f16700Schasinglulu #endif /* EFUSE_DEF_H */
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