1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2013-2014, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef MMIO_H 8*91f16700Schasinglulu #define MMIO_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <stdint.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu static inline void mmio_write_8(uintptr_t addr, uint8_t value) 13*91f16700Schasinglulu { 14*91f16700Schasinglulu *(volatile uint8_t*)addr = value; 15*91f16700Schasinglulu } 16*91f16700Schasinglulu 17*91f16700Schasinglulu static inline uint8_t mmio_read_8(uintptr_t addr) 18*91f16700Schasinglulu { 19*91f16700Schasinglulu return *(volatile uint8_t*)addr; 20*91f16700Schasinglulu } 21*91f16700Schasinglulu 22*91f16700Schasinglulu static inline void mmio_write_16(uintptr_t addr, uint16_t value) 23*91f16700Schasinglulu { 24*91f16700Schasinglulu *(volatile uint16_t*)addr = value; 25*91f16700Schasinglulu } 26*91f16700Schasinglulu 27*91f16700Schasinglulu static inline uint16_t mmio_read_16(uintptr_t addr) 28*91f16700Schasinglulu { 29*91f16700Schasinglulu return *(volatile uint16_t*)addr; 30*91f16700Schasinglulu } 31*91f16700Schasinglulu 32*91f16700Schasinglulu static inline void mmio_clrsetbits_16(uintptr_t addr, 33*91f16700Schasinglulu uint16_t clear, 34*91f16700Schasinglulu uint16_t set) 35*91f16700Schasinglulu { 36*91f16700Schasinglulu mmio_write_16(addr, (mmio_read_16(addr) & ~clear) | set); 37*91f16700Schasinglulu } 38*91f16700Schasinglulu 39*91f16700Schasinglulu static inline void mmio_write_32(uintptr_t addr, uint32_t value) 40*91f16700Schasinglulu { 41*91f16700Schasinglulu *(volatile uint32_t*)addr = value; 42*91f16700Schasinglulu } 43*91f16700Schasinglulu 44*91f16700Schasinglulu static inline uint32_t mmio_read_32(uintptr_t addr) 45*91f16700Schasinglulu { 46*91f16700Schasinglulu return *(volatile uint32_t*)addr; 47*91f16700Schasinglulu } 48*91f16700Schasinglulu 49*91f16700Schasinglulu static inline void mmio_write_64(uintptr_t addr, uint64_t value) 50*91f16700Schasinglulu { 51*91f16700Schasinglulu *(volatile uint64_t*)addr = value; 52*91f16700Schasinglulu } 53*91f16700Schasinglulu 54*91f16700Schasinglulu static inline uint64_t mmio_read_64(uintptr_t addr) 55*91f16700Schasinglulu { 56*91f16700Schasinglulu return *(volatile uint64_t*)addr; 57*91f16700Schasinglulu } 58*91f16700Schasinglulu 59*91f16700Schasinglulu static inline void mmio_clrbits_32(uintptr_t addr, uint32_t clear) 60*91f16700Schasinglulu { 61*91f16700Schasinglulu mmio_write_32(addr, mmio_read_32(addr) & ~clear); 62*91f16700Schasinglulu } 63*91f16700Schasinglulu 64*91f16700Schasinglulu static inline void mmio_setbits_32(uintptr_t addr, uint32_t set) 65*91f16700Schasinglulu { 66*91f16700Schasinglulu mmio_write_32(addr, mmio_read_32(addr) | set); 67*91f16700Schasinglulu } 68*91f16700Schasinglulu 69*91f16700Schasinglulu static inline void mmio_clrsetbits_32(uintptr_t addr, 70*91f16700Schasinglulu uint32_t clear, 71*91f16700Schasinglulu uint32_t set) 72*91f16700Schasinglulu { 73*91f16700Schasinglulu mmio_write_32(addr, (mmio_read_32(addr) & ~clear) | set); 74*91f16700Schasinglulu } 75*91f16700Schasinglulu 76*91f16700Schasinglulu #endif /* MMIO_H */ 77