xref: /arm-trusted-firmware/include/lib/coreboot.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2017-2020, Arm Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef COREBOOT_H
8*91f16700Schasinglulu #define COREBOOT_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <stdint.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu typedef struct {
13*91f16700Schasinglulu 	uint32_t type;			/* always 2 (memory-mapped) on ARM */
14*91f16700Schasinglulu 	uint32_t baseaddr;
15*91f16700Schasinglulu 	uint32_t baud;
16*91f16700Schasinglulu 	uint32_t regwidth;		/* in bytes, i.e. usually 4 */
17*91f16700Schasinglulu 	uint32_t input_hertz;
18*91f16700Schasinglulu 	uint32_t uart_pci_addr;		/* unused on current ARM systems */
19*91f16700Schasinglulu } coreboot_serial_t;
20*91f16700Schasinglulu extern coreboot_serial_t coreboot_serial;
21*91f16700Schasinglulu 
22*91f16700Schasinglulu #define COREBOOT_MAX_MEMRANGES	32	/* libpayload also uses this limit */
23*91f16700Schasinglulu 
24*91f16700Schasinglulu typedef struct __packed {
25*91f16700Schasinglulu 	uint64_t start;
26*91f16700Schasinglulu 	uint64_t size;
27*91f16700Schasinglulu 	uint32_t type;
28*91f16700Schasinglulu } coreboot_memrange_t;
29*91f16700Schasinglulu extern coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES];
30*91f16700Schasinglulu 
31*91f16700Schasinglulu typedef enum {
32*91f16700Schasinglulu 	CB_MEM_NONE		= 0,	/* coreboot will never report this */
33*91f16700Schasinglulu 	CB_MEM_RAM		= 1,
34*91f16700Schasinglulu 	CB_MEM_RESERVED		= 2,
35*91f16700Schasinglulu 	CB_MEM_ACPI		= 3,
36*91f16700Schasinglulu 	CB_MEM_NVS		= 4,
37*91f16700Schasinglulu 	CB_MEM_UNUSABLE		= 5,
38*91f16700Schasinglulu 	CB_MEM_VENDOR_RSVD	= 6,
39*91f16700Schasinglulu 	CB_MEM_TABLE		= 16,
40*91f16700Schasinglulu } coreboot_memory_t;
41*91f16700Schasinglulu 
42*91f16700Schasinglulu coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size);
43*91f16700Schasinglulu void coreboot_table_setup(void *base);
44*91f16700Schasinglulu void coreboot_get_table_location(uint64_t *address, uint32_t *size);
45*91f16700Schasinglulu 
46*91f16700Schasinglulu #endif /* COREBOOT_H */
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