1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * Copyright (C) 2022, STMicroelectronics - All Rights Reserved 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef _DT_BINDINGS_STM32MP13_TZC400_H 8*91f16700Schasinglulu #define _DT_BINDINGS_STM32MP13_TZC400_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <drivers/arm/tzc_common.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define STM32MP1_TZC_A7_ID U(0) 13*91f16700Schasinglulu #define STM32MP1_TZC_LCD_ID U(3) 14*91f16700Schasinglulu #define STM32MP1_TZC_MDMA_ID U(5) 15*91f16700Schasinglulu #define STM32MP1_TZC_DMA_ID U(6) 16*91f16700Schasinglulu #define STM32MP1_TZC_USB_HOST_ID U(7) 17*91f16700Schasinglulu #define STM32MP1_TZC_USB_OTG_ID U(8) 18*91f16700Schasinglulu #define STM32MP1_TZC_SDMMC_ID U(9) 19*91f16700Schasinglulu #define STM32MP1_TZC_ETH_ID U(10) 20*91f16700Schasinglulu #define STM32MP1_TZC_DCMIPP_ID U(11) 21*91f16700Schasinglulu #define STM32MP1_TZC_DAP_ID U(15) 22*91f16700Schasinglulu 23*91f16700Schasinglulu #define TZC_REGION_NSEC_ALL_ACCESS_RDWR \ 24*91f16700Schasinglulu (TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_A7_ID) | \ 25*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_LCD_ID) | \ 26*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_MDMA_ID) | \ 27*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DMA_ID) | \ 28*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_HOST_ID) | \ 29*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_OTG_ID) | \ 30*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_SDMMC_ID) | \ 31*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_ETH_ID) | \ 32*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DCMIPP_ID) | \ 33*91f16700Schasinglulu TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DAP_ID)) 34*91f16700Schasinglulu 35*91f16700Schasinglulu #endif /* _DT_BINDINGS_STM32MP13_TZC400_H */ 36