1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright 2020-2021 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #ifndef LS_INTERCONNECT_H 9*91f16700Schasinglulu #define LS_INTERCONNECT_H 10*91f16700Schasinglulu 11*91f16700Schasinglulu #if (INTERCONNECT == CCI400) 12*91f16700Schasinglulu #define CCI_TERMINATE_BARRIER_TX 0x8 13*91f16700Schasinglulu #endif 14*91f16700Schasinglulu 15*91f16700Schasinglulu /* Interconnect CCI/CCN functions */ 16*91f16700Schasinglulu void plat_ls_interconnect_enter_coherency(unsigned int num_clusters); 17*91f16700Schasinglulu void plat_ls_interconnect_exit_coherency(void); 18*91f16700Schasinglulu 19*91f16700Schasinglulu #endif 20