1*91f16700Schasinglulu // SPDX-License-Identifier: BSD-3-Clause 2*91f16700Schasinglulu /* 3*91f16700Schasinglulu * Copyright 2020-2021 NXP 4*91f16700Schasinglulu */ 5*91f16700Schasinglulu 6*91f16700Schasinglulu /** 7*91f16700Schasinglulu * @Flash info 8*91f16700Schasinglulu * 9*91f16700Schasinglulu */ 10*91f16700Schasinglulu #ifndef FLASH_INFO_H 11*91f16700Schasinglulu #define FLASH_INFO_H 12*91f16700Schasinglulu 13*91f16700Schasinglulu #define SZ_16M_BYTES 0x1000000U 14*91f16700Schasinglulu 15*91f16700Schasinglulu /* Start of "if defined(CONFIG_MT25QU512A)" */ 16*91f16700Schasinglulu #if defined(CONFIG_MT25QU512A) 17*91f16700Schasinglulu #define F_SECTOR_64K 0x10000U 18*91f16700Schasinglulu #define F_PAGE_256 0x100U 19*91f16700Schasinglulu #define F_SECTOR_4K 0x1000U 20*91f16700Schasinglulu #define F_FLASH_SIZE_BYTES 0x4000000U 21*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_64K 22*91f16700Schasinglulu #ifdef CONFIG_FSPI_4K_ERASE 23*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_4K 24*91f16700Schasinglulu #endif 25*91f16700Schasinglulu 26*91f16700Schasinglulu /* End of "if defined(CONFIG_MT25QU512A)" */ 27*91f16700Schasinglulu 28*91f16700Schasinglulu /* Start of "if defined(CONFIG_MX25U25645G)" */ 29*91f16700Schasinglulu #elif defined(CONFIG_MX25U25645G) 30*91f16700Schasinglulu #define F_SECTOR_64K 0x10000U 31*91f16700Schasinglulu #define F_PAGE_256 0x100U 32*91f16700Schasinglulu #define F_SECTOR_4K 0x1000U 33*91f16700Schasinglulu #define F_FLASH_SIZE_BYTES 0x2000000U 34*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_64K 35*91f16700Schasinglulu #ifdef CONFIG_FSPI_4K_ERASE 36*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_4K 37*91f16700Schasinglulu #endif 38*91f16700Schasinglulu 39*91f16700Schasinglulu /* End of "if defined(CONFIG_MX25U25645G)" */ 40*91f16700Schasinglulu 41*91f16700Schasinglulu /* Start of "if defined(CONFIG_MX25U51245G)" */ 42*91f16700Schasinglulu #elif defined(CONFIG_MX25U51245G) 43*91f16700Schasinglulu #define F_SECTOR_64K 0x10000U 44*91f16700Schasinglulu #define F_PAGE_256 0x100U 45*91f16700Schasinglulu #define F_SECTOR_4K 0x1000U 46*91f16700Schasinglulu #define F_FLASH_SIZE_BYTES 0x4000000U 47*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_64K 48*91f16700Schasinglulu #ifdef CONFIG_FSPI_4K_ERASE 49*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_4K 50*91f16700Schasinglulu #endif 51*91f16700Schasinglulu 52*91f16700Schasinglulu /* End of "if defined(CONFIG_MX25U51245G)" */ 53*91f16700Schasinglulu 54*91f16700Schasinglulu /* Start of "if defined(CONFIG_MT35XU512A)" */ 55*91f16700Schasinglulu #elif defined(CONFIG_MT35XU512A) 56*91f16700Schasinglulu #define F_SECTOR_128K 0x20000U 57*91f16700Schasinglulu #define F_SECTOR_32K 0x8000U 58*91f16700Schasinglulu #define F_PAGE_256 0x100U 59*91f16700Schasinglulu #define F_SECTOR_4K 0x1000U 60*91f16700Schasinglulu #define F_FLASH_SIZE_BYTES 0x4000000U 61*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_128K 62*91f16700Schasinglulu #ifdef CONFIG_FSPI_4K_ERASE 63*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_4K 64*91f16700Schasinglulu #endif 65*91f16700Schasinglulu /* If Warm boot is enabled for the platform, 66*91f16700Schasinglulu * count of arm instruction N-OP(s) to mark 67*91f16700Schasinglulu * the completion of write operation to flash; 68*91f16700Schasinglulu * varies from one flash to other. 69*91f16700Schasinglulu */ 70*91f16700Schasinglulu #ifdef NXP_WARM_BOOT 71*91f16700Schasinglulu #define FLASH_WR_COMP_WAIT_BY_NOP_COUNT 0x20000 72*91f16700Schasinglulu #endif 73*91f16700Schasinglulu 74*91f16700Schasinglulu /* End of "if defined(CONFIG_MT35XU512A)" */ 75*91f16700Schasinglulu 76*91f16700Schasinglulu /* Start of #elif defined(CONFIG_MT35XU02G) */ 77*91f16700Schasinglulu #elif defined(CONFIG_MT35XU02G) 78*91f16700Schasinglulu #define F_SECTOR_128K 0x20000U 79*91f16700Schasinglulu #define F_PAGE_256 0x100U 80*91f16700Schasinglulu #define F_SECTOR_4K 0x1000U 81*91f16700Schasinglulu #define F_FLASH_SIZE_BYTES 0x10000000U 82*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_128K 83*91f16700Schasinglulu #ifdef CONFIG_FSPI_4K_ERASE 84*91f16700Schasinglulu #define F_SECTOR_ERASE_SZ F_SECTOR_4K 85*91f16700Schasinglulu #endif 86*91f16700Schasinglulu 87*91f16700Schasinglulu #endif /* End of #elif defined(CONFIG_MT35XU02G) */ 88*91f16700Schasinglulu 89*91f16700Schasinglulu #endif /* FLASH_INFO_H */ 90