1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright 2021 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #ifndef CSU_H 9*91f16700Schasinglulu #define CSU_H 10*91f16700Schasinglulu 11*91f16700Schasinglulu #define CSU_SEC_ACCESS_REG_OFFSET (0x0021CU) 12*91f16700Schasinglulu /* Bit mask */ 13*91f16700Schasinglulu #define TZASC_BYPASS_MUX_DISABLE (0x4U) 14*91f16700Schasinglulu 15*91f16700Schasinglulu /* Macros defining access permissions to configure 16*91f16700Schasinglulu * the regions controlled by Central Security Unit. 17*91f16700Schasinglulu */ 18*91f16700Schasinglulu enum csu_cslx_access { 19*91f16700Schasinglulu CSU_NS_SUP_R = (0x8U), 20*91f16700Schasinglulu CSU_NS_SUP_W = (0x80U), 21*91f16700Schasinglulu CSU_NS_SUP_RW = (0x88U), 22*91f16700Schasinglulu CSU_NS_USER_R = (0x4U), 23*91f16700Schasinglulu CSU_NS_USER_W = (0x40U), 24*91f16700Schasinglulu CSU_NS_USER_RW = (0x44U), 25*91f16700Schasinglulu CSU_S_SUP_R = (0x2U), 26*91f16700Schasinglulu CSU_S_SUP_W = (0x20U), 27*91f16700Schasinglulu CSU_S_SUP_RW = (0x22U), 28*91f16700Schasinglulu CSU_S_USER_R = (0x1U), 29*91f16700Schasinglulu CSU_S_USER_W = (0x10U), 30*91f16700Schasinglulu CSU_S_USER_RW = (0x11U), 31*91f16700Schasinglulu CSU_ALL_RW = (0xffU), 32*91f16700Schasinglulu }; 33*91f16700Schasinglulu 34*91f16700Schasinglulu struct csu_ns_dev_st { 35*91f16700Schasinglulu uintptr_t ind; 36*91f16700Schasinglulu uint32_t val; 37*91f16700Schasinglulu }; 38*91f16700Schasinglulu 39*91f16700Schasinglulu void enable_layerscape_ns_access(struct csu_ns_dev_st *csu_ns_dev, 40*91f16700Schasinglulu uint32_t num, uintptr_t nxp_csu_addr); 41*91f16700Schasinglulu 42*91f16700Schasinglulu #endif 43