1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019-2020, Broadcom 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef SF_H 8*91f16700Schasinglulu #define SF_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <stdint.h> 11*91f16700Schasinglulu #include <stddef.h> 12*91f16700Schasinglulu 13*91f16700Schasinglulu #ifdef SPI_DEBUG 14*91f16700Schasinglulu #define SPI_DEBUG(fmt, ...) INFO(fmt, ##__VA_ARGS__) 15*91f16700Schasinglulu #else 16*91f16700Schasinglulu #define SPI_DEBUG(fmt, ...) 17*91f16700Schasinglulu #endif 18*91f16700Schasinglulu 19*91f16700Schasinglulu #define SPI_FLASH_MAX_ID_LEN 6 20*91f16700Schasinglulu 21*91f16700Schasinglulu #define CMD_WRSR 0x01 /* Write status register */ 22*91f16700Schasinglulu #define CMD_PAGE_PROGRAM 0x02 23*91f16700Schasinglulu #define CMD_READ_NORMAL 0x03 24*91f16700Schasinglulu #define CMD_RDSR 0x05 25*91f16700Schasinglulu #define CMD_WRITE_ENABLE 0x06 26*91f16700Schasinglulu #define CMD_RDFSR 0x70 27*91f16700Schasinglulu #define CMD_READ_ID 0x9f 28*91f16700Schasinglulu #define CMD_ERASE_4K 0x20 29*91f16700Schasinglulu #define CMD_ERASE_64K 0xd8 30*91f16700Schasinglulu #define ERASE_SIZE_64K (64 * 1024) 31*91f16700Schasinglulu 32*91f16700Schasinglulu /* Common status */ 33*91f16700Schasinglulu #define STATUS_WIP BIT(0) 34*91f16700Schasinglulu 35*91f16700Schasinglulu struct spi_flash { 36*91f16700Schasinglulu struct spi_slave *spi; 37*91f16700Schasinglulu uint32_t size; 38*91f16700Schasinglulu uint32_t page_size; 39*91f16700Schasinglulu uint32_t sector_size; 40*91f16700Schasinglulu uint32_t erase_size; 41*91f16700Schasinglulu uint8_t erase_cmd; 42*91f16700Schasinglulu uint8_t read_cmd; 43*91f16700Schasinglulu uint8_t write_cmd; 44*91f16700Schasinglulu uint8_t flags; 45*91f16700Schasinglulu }; 46*91f16700Schasinglulu 47*91f16700Schasinglulu struct spi_flash_info { 48*91f16700Schasinglulu const char *name; 49*91f16700Schasinglulu 50*91f16700Schasinglulu /* 51*91f16700Schasinglulu * This array stores the ID bytes. 52*91f16700Schasinglulu * The first three bytes are the JEDIC ID. 53*91f16700Schasinglulu * JEDEC ID zero means "no ID" (mostly older chips). 54*91f16700Schasinglulu */ 55*91f16700Schasinglulu uint8_t id[SPI_FLASH_MAX_ID_LEN]; 56*91f16700Schasinglulu uint8_t id_len; 57*91f16700Schasinglulu 58*91f16700Schasinglulu uint32_t sector_size; 59*91f16700Schasinglulu uint32_t n_sectors; 60*91f16700Schasinglulu uint16_t page_size; 61*91f16700Schasinglulu 62*91f16700Schasinglulu uint8_t flags; 63*91f16700Schasinglulu }; 64*91f16700Schasinglulu 65*91f16700Schasinglulu /* Enum list - Full read commands */ 66*91f16700Schasinglulu enum spi_read_cmds { 67*91f16700Schasinglulu ARRAY_SLOW = BIT(0), 68*91f16700Schasinglulu ARRAY_FAST = BIT(1), 69*91f16700Schasinglulu DUAL_OUTPUT_FAST = BIT(2), 70*91f16700Schasinglulu DUAL_IO_FAST = BIT(3), 71*91f16700Schasinglulu QUAD_OUTPUT_FAST = BIT(4), 72*91f16700Schasinglulu QUAD_IO_FAST = BIT(5), 73*91f16700Schasinglulu }; 74*91f16700Schasinglulu 75*91f16700Schasinglulu /* sf param flags */ 76*91f16700Schasinglulu enum spi_param_flag { 77*91f16700Schasinglulu SECT_4K = BIT(0), 78*91f16700Schasinglulu SECT_32K = BIT(1), 79*91f16700Schasinglulu E_FSR = BIT(2), 80*91f16700Schasinglulu SST_BP = BIT(3), 81*91f16700Schasinglulu SST_WP = BIT(4), 82*91f16700Schasinglulu WR_QPP = BIT(5), 83*91f16700Schasinglulu }; 84*91f16700Schasinglulu 85*91f16700Schasinglulu int spi_flash_cmd_read(const uint8_t *cmd, size_t cmd_len, 86*91f16700Schasinglulu void *data, size_t data_len); 87*91f16700Schasinglulu int spi_flash_cmd(uint8_t cmd, void *response, size_t len); 88*91f16700Schasinglulu int spi_flash_cmd_write(const uint8_t *cmd, size_t cmd_len, 89*91f16700Schasinglulu const void *data, size_t data_len); 90*91f16700Schasinglulu #endif 91