1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2016 - 2020, Broadcom 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef CSL_SD_H 8*91f16700Schasinglulu #define CSL_SD_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #define SD_CLOCK_BASE 104000000 11*91f16700Schasinglulu #define SD_CLOCK_52MHZ 52000000 12*91f16700Schasinglulu #define SD_CLOCK_26MHZ 26000000 13*91f16700Schasinglulu #define SD_CLOCK_17MHZ 17330000 14*91f16700Schasinglulu #define SD_CLOCK_13MHZ 13000000 15*91f16700Schasinglulu #define SD_CLOCK_10MHZ 10000000 16*91f16700Schasinglulu #define SD_CLOCK_9MHZ 9000000 17*91f16700Schasinglulu #define SD_CLOCK_7MHZ 7000000 18*91f16700Schasinglulu #define SD_CLOCK_5MHZ 5000000 19*91f16700Schasinglulu #define SD_CLOCK_1MHZ 1000000 20*91f16700Schasinglulu #define SD_CLOCK_400KHZ 400000 21*91f16700Schasinglulu 22*91f16700Schasinglulu #define SD_DRIVE_STRENGTH_MASK 0x38000000 23*91f16700Schasinglulu #if defined(_BCM213x1_) || defined(_BCM21551_) || defined(_ATHENA_) 24*91f16700Schasinglulu #define SD_DRIVE_STRENGTH 0x28000000 25*91f16700Schasinglulu #elif defined(_BCM2153_) 26*91f16700Schasinglulu #define SD_DRIVE_STRENGTH 0x38000000 27*91f16700Schasinglulu #else 28*91f16700Schasinglulu #define SD_DRIVE_STRENGTH 0x00000000 29*91f16700Schasinglulu #endif 30*91f16700Schasinglulu 31*91f16700Schasinglulu #define SD_NUM_HOST 2 32*91f16700Schasinglulu 33*91f16700Schasinglulu #define SD_CARD_UNLOCK 0 34*91f16700Schasinglulu #define SD_CARD_LOCK 0x4 35*91f16700Schasinglulu #define SD_CARD_CLEAR_PWD 0x2 36*91f16700Schasinglulu #define SD_CARD_SET_PWD 0x1 37*91f16700Schasinglulu #define SD_CARD_ERASE_PWD 0x8 38*91f16700Schasinglulu 39*91f16700Schasinglulu #define SD_CARD_LOCK_STATUS 0x02000000 40*91f16700Schasinglulu #define SD_CARD_UNLOCK_STATUS 0x01000000 41*91f16700Schasinglulu 42*91f16700Schasinglulu #define SD_CMD_ERROR_FLAGS (0x18F << 16) 43*91f16700Schasinglulu #define SD_DATA_ERROR_FLAGS (0x70 << 16) 44*91f16700Schasinglulu #define SD_AUTO_CMD12_ERROR_FLAGS (0x9F) 45*91f16700Schasinglulu #define SD_CARD_STATUS_ERROR 0x10000000 46*91f16700Schasinglulu #define SD_CMD_MISSING 0x80000000 47*91f16700Schasinglulu 48*91f16700Schasinglulu #define SD_TRAN_HIGH_SPEED 0x32 49*91f16700Schasinglulu #define SD_CARD_HIGH_CAPACITY 0x40000000 50*91f16700Schasinglulu #define SD_CARD_POWER_UP_STATUS 0x80000000 51*91f16700Schasinglulu 52*91f16700Schasinglulu struct sd_dev_info { 53*91f16700Schasinglulu uint32_t mode; /* interrupt or polling */ 54*91f16700Schasinglulu uint32_t dma; /* dma enabled or disabled */ 55*91f16700Schasinglulu uint32_t voltage; /* voltage level */ 56*91f16700Schasinglulu uint32_t slot; /* if the HC is locatd at slot 0 or slot 1 */ 57*91f16700Schasinglulu uint32_t version; /* 1.0 or 2.0 */ 58*91f16700Schasinglulu uint32_t curSystemAddr; /* system address */ 59*91f16700Schasinglulu uint32_t dataWidth; /* data width for the controller */ 60*91f16700Schasinglulu uint32_t clock; /* clock rate */ 61*91f16700Schasinglulu uint32_t status; /* if device is active on transfer or not */ 62*91f16700Schasinglulu }; 63*91f16700Schasinglulu 64*91f16700Schasinglulu void data_xfer_setup(struct sd_handle *handle, uint8_t *data, 65*91f16700Schasinglulu uint32_t length, int dir); 66*91f16700Schasinglulu int reset_card(struct sd_handle *handle); 67*91f16700Schasinglulu int reset_host_ctrl(struct sd_handle *handle); 68*91f16700Schasinglulu int init_card(struct sd_handle *handle, int detection); 69*91f16700Schasinglulu int init_mmc_card(struct sd_handle *handle); 70*91f16700Schasinglulu int write_buffer(struct sd_handle *handle, uint32_t len, uint8_t *buffer); 71*91f16700Schasinglulu int read_buffer(struct sd_handle *handle, uint32_t len, uint8_t *buffer); 72*91f16700Schasinglulu int select_blk_sz(struct sd_handle *handle, uint16_t size); 73*91f16700Schasinglulu int check_error(struct sd_handle *handle, uint32_t ints); 74*91f16700Schasinglulu 75*91f16700Schasinglulu int process_data_xfer(struct sd_handle *handle, uint8_t *buffer, 76*91f16700Schasinglulu uint32_t addr, uint32_t length, int dir); 77*91f16700Schasinglulu int read_block(struct sd_handle *handle, uint8_t *dst, uint32_t addr, 78*91f16700Schasinglulu uint32_t len); 79*91f16700Schasinglulu #ifdef INCLUDE_EMMC_DRIVER_ERASE_CODE 80*91f16700Schasinglulu int erase_card(struct sd_handle *handle, uint32_t addr, uint32_t blocks); 81*91f16700Schasinglulu #endif 82*91f16700Schasinglulu int write_block(struct sd_handle *handle, uint8_t *src, uint32_t addr, 83*91f16700Schasinglulu uint32_t len); 84*91f16700Schasinglulu int process_cmd_response(struct sd_handle *handle, uint32_t cmdIndex, 85*91f16700Schasinglulu uint32_t rsp0, uint32_t rsp1, uint32_t rsp2, 86*91f16700Schasinglulu uint32_t rsp3, struct sd_resp *resp); 87*91f16700Schasinglulu int32_t set_config(struct sd_handle *handle, uint32_t speed, 88*91f16700Schasinglulu uint32_t retry, uint32_t dma, uint32_t dmaBound, 89*91f16700Schasinglulu uint32_t blkSize, uint32_t wfe_retry); 90*91f16700Schasinglulu 91*91f16700Schasinglulu uint32_t wait_for_event(struct sd_handle *handle, uint32_t mask, 92*91f16700Schasinglulu uint32_t retry); 93*91f16700Schasinglulu int set_boot_config(struct sd_handle *handle, uint32_t config); 94*91f16700Schasinglulu 95*91f16700Schasinglulu int mmc_cmd1(struct sd_handle *handle); 96*91f16700Schasinglulu #endif /* CSL_SD_H */ 97