xref: /arm-trusted-firmware/include/drivers/arm/sbsa.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef SBSA_H
8*91f16700Schasinglulu #define SBSA_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <stdint.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu /* SBSA Secure Watchdog Register Offsets */
13*91f16700Schasinglulu /* Refresh frame */
14*91f16700Schasinglulu #define SBSA_WDOG_WRR_OFFSET		UL(0x000)
15*91f16700Schasinglulu #define SBSA_WDOG_WRR_REFRESH		UL(0x1)
16*91f16700Schasinglulu 
17*91f16700Schasinglulu /* Control and status frame */
18*91f16700Schasinglulu #define SBSA_WDOG_WCS_OFFSET		UL(0x000)
19*91f16700Schasinglulu #define SBSA_WDOG_WOR_LOW_OFFSET	UL(0x008)
20*91f16700Schasinglulu #define SBSA_WDOG_WOR_HIGH_OFFSET	UL(0x00C)
21*91f16700Schasinglulu 
22*91f16700Schasinglulu #define SBSA_WDOG_WCS_EN		U(0x1)
23*91f16700Schasinglulu 
24*91f16700Schasinglulu #define SBSA_WDOG_WOR_WIDTH		UL(48)
25*91f16700Schasinglulu 
26*91f16700Schasinglulu void sbsa_wdog_start(uintptr_t base, uint64_t ms);
27*91f16700Schasinglulu void sbsa_wdog_stop(uintptr_t base);
28*91f16700Schasinglulu void sbsa_wdog_refresh(uintptr_t refresh_base);
29*91f16700Schasinglulu 
30*91f16700Schasinglulu #endif /* SBSA_H */
31