1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2021-2023, Arm Limited. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef ETHOSN_H 8*91f16700Schasinglulu #define ETHOSN_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <lib/smccc.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu /* Function numbers */ 13*91f16700Schasinglulu #define ETHOSN_FNUM_VERSION U(0x50) 14*91f16700Schasinglulu #define ETHOSN_FNUM_IS_SEC U(0x51) 15*91f16700Schasinglulu #define ETHOSN_FNUM_HARD_RESET U(0x52) 16*91f16700Schasinglulu #define ETHOSN_FNUM_SOFT_RESET U(0x53) 17*91f16700Schasinglulu #define ETHOSN_FNUM_IS_SLEEPING U(0x54) 18*91f16700Schasinglulu #define ETHOSN_FNUM_GET_FW_PROP U(0x55) 19*91f16700Schasinglulu #define ETHOSN_FNUM_BOOT_FW U(0x56) 20*91f16700Schasinglulu /* 0x57-0x5F reserved for future use */ 21*91f16700Schasinglulu 22*91f16700Schasinglulu /* Properties for ETHOSN_FNUM_TZMP_GET_FW_PROP */ 23*91f16700Schasinglulu #define ETHOSN_FW_PROP_VERSION U(0xF00) 24*91f16700Schasinglulu #define ETHOSN_FW_PROP_MEM_INFO U(0xF01) 25*91f16700Schasinglulu #define ETHOSN_FW_PROP_OFFSETS U(0xF02) 26*91f16700Schasinglulu #define ETHOSN_FW_PROP_VA_MAP U(0xF03) 27*91f16700Schasinglulu 28*91f16700Schasinglulu /* SMC64 function IDs */ 29*91f16700Schasinglulu #define ETHOSN_FID_64(func_num) U(0xC2000000 | func_num) 30*91f16700Schasinglulu #define ETHOSN_FID_VERSION_64 ETHOSN_FID_64(ETHOSN_FNUM_VERSION) 31*91f16700Schasinglulu #define ETHOSN_FID_IS_SEC_64 ETHOSN_FID_64(ETHOSN_FNUM_IS_SEC) 32*91f16700Schasinglulu #define ETHOSN_FID_HARD_RESET_64 ETHOSN_FID_64(ETHOSN_FNUM_HARD_RESET) 33*91f16700Schasinglulu #define ETHOSN_FID_SOFT_RESET_64 ETHOSN_FID_64(ETHOSN_FNUM_SOFT_RESET) 34*91f16700Schasinglulu 35*91f16700Schasinglulu /* SMC32 function IDs */ 36*91f16700Schasinglulu #define ETHOSN_FID_32(func_num) U(0x82000000 | func_num) 37*91f16700Schasinglulu #define ETHOSN_FID_VERSION_32 ETHOSN_FID_32(ETHOSN_FNUM_VERSION) 38*91f16700Schasinglulu #define ETHOSN_FID_IS_SEC_32 ETHOSN_FID_32(ETHOSN_FNUM_IS_SEC) 39*91f16700Schasinglulu #define ETHOSN_FID_HARD_RESET_32 ETHOSN_FID_32(ETHOSN_FNUM_HARD_RESET) 40*91f16700Schasinglulu #define ETHOSN_FID_SOFT_RESET_32 ETHOSN_FID_32(ETHOSN_FNUM_SOFT_RESET) 41*91f16700Schasinglulu 42*91f16700Schasinglulu #define ETHOSN_NUM_SMC_CALLS 8 43*91f16700Schasinglulu 44*91f16700Schasinglulu /* Macro to identify function calls */ 45*91f16700Schasinglulu #define ETHOSN_FID_MASK U(0xFFF0) 46*91f16700Schasinglulu #define ETHOSN_FID_VALUE U(0x50) 47*91f16700Schasinglulu #define is_ethosn_fid(_fid) (((_fid) & ETHOSN_FID_MASK) == ETHOSN_FID_VALUE) 48*91f16700Schasinglulu 49*91f16700Schasinglulu /* Service version */ 50*91f16700Schasinglulu #define ETHOSN_VERSION_MAJOR U(4) 51*91f16700Schasinglulu #define ETHOSN_VERSION_MINOR U(0) 52*91f16700Schasinglulu 53*91f16700Schasinglulu /* Return codes for function calls */ 54*91f16700Schasinglulu #define ETHOSN_SUCCESS 0 55*91f16700Schasinglulu #define ETHOSN_NOT_SUPPORTED -1 56*91f16700Schasinglulu /* -2 Reserved for NOT_REQUIRED */ 57*91f16700Schasinglulu #define ETHOSN_INVALID_PARAMETER -3 58*91f16700Schasinglulu #define ETHOSN_FAILURE -4 59*91f16700Schasinglulu #define ETHOSN_UNKNOWN_CORE_ADDRESS -5 60*91f16700Schasinglulu #define ETHOSN_UNKNOWN_ALLOCATOR_IDX -6 61*91f16700Schasinglulu #define ETHOSN_INVALID_CONFIGURATION -7 62*91f16700Schasinglulu #define ETHOSN_INVALID_STATE -8 63*91f16700Schasinglulu 64*91f16700Schasinglulu /* 65*91f16700Schasinglulu * Argument types for soft and hard resets to indicate whether to reset 66*91f16700Schasinglulu * and reconfigure the NPU or only halt it 67*91f16700Schasinglulu */ 68*91f16700Schasinglulu #define ETHOSN_RESET_TYPE_FULL U(0) 69*91f16700Schasinglulu #define ETHOSN_RESET_TYPE_HALT U(1) 70*91f16700Schasinglulu 71*91f16700Schasinglulu int ethosn_smc_setup(void); 72*91f16700Schasinglulu 73*91f16700Schasinglulu uintptr_t ethosn_smc_handler(uint32_t smc_fid, 74*91f16700Schasinglulu u_register_t core_addr, 75*91f16700Schasinglulu u_register_t asset_alloc_idx, 76*91f16700Schasinglulu u_register_t reset_type, 77*91f16700Schasinglulu u_register_t x4, 78*91f16700Schasinglulu void *cookie, 79*91f16700Schasinglulu void *handle, 80*91f16700Schasinglulu u_register_t flags); 81*91f16700Schasinglulu 82*91f16700Schasinglulu #endif /* ETHOSN_H */ 83