1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef AXP_H 8*91f16700Schasinglulu #define AXP_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <stdint.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #define AXP20X_MODE_REG 0x3e 13*91f16700Schasinglulu #define AXP20X_MODE_I2C 0x00 14*91f16700Schasinglulu #define AXP20X_MODE_RSB 0x7c 15*91f16700Schasinglulu 16*91f16700Schasinglulu #define NA 0xff 17*91f16700Schasinglulu 18*91f16700Schasinglulu enum { 19*91f16700Schasinglulu AXP803_CHIP_ID = 0x41, 20*91f16700Schasinglulu AXP805_CHIP_ID = 0x40, 21*91f16700Schasinglulu }; 22*91f16700Schasinglulu 23*91f16700Schasinglulu struct axp_regulator { 24*91f16700Schasinglulu const char *dt_name; 25*91f16700Schasinglulu uint16_t min_volt; 26*91f16700Schasinglulu uint16_t max_volt; 27*91f16700Schasinglulu uint16_t step; 28*91f16700Schasinglulu unsigned char split; 29*91f16700Schasinglulu unsigned char volt_reg; 30*91f16700Schasinglulu unsigned char switch_reg; 31*91f16700Schasinglulu unsigned char switch_bit; 32*91f16700Schasinglulu }; 33*91f16700Schasinglulu 34*91f16700Schasinglulu extern const uint8_t axp_chip_id; 35*91f16700Schasinglulu extern const char *const axp_compatible; 36*91f16700Schasinglulu extern const struct axp_regulator axp_regulators[]; 37*91f16700Schasinglulu 38*91f16700Schasinglulu /* 39*91f16700Schasinglulu * Since the PMIC can be connected to multiple bus types, 40*91f16700Schasinglulu * low-level read/write functions must be provided by the platform 41*91f16700Schasinglulu */ 42*91f16700Schasinglulu int axp_read(uint8_t reg); 43*91f16700Schasinglulu int axp_write(uint8_t reg, uint8_t val); 44*91f16700Schasinglulu int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask); 45*91f16700Schasinglulu #define axp_clrbits(reg, clr_mask) axp_clrsetbits(reg, clr_mask, 0) 46*91f16700Schasinglulu #define axp_setbits(reg, set_mask) axp_clrsetbits(reg, 0, set_mask) 47*91f16700Schasinglulu 48*91f16700Schasinglulu int axp_check_id(void); 49*91f16700Schasinglulu void axp_power_off(void); 50*91f16700Schasinglulu 51*91f16700Schasinglulu #if SUNXI_SETUP_REGULATORS == 1 52*91f16700Schasinglulu void axp_setup_regulators(const void *fdt); 53*91f16700Schasinglulu #else 54*91f16700Schasinglulu static inline void axp_setup_regulators(const void *fdt) 55*91f16700Schasinglulu { 56*91f16700Schasinglulu } 57*91f16700Schasinglulu #endif 58*91f16700Schasinglulu 59*91f16700Schasinglulu #endif /* AXP_H */ 60