1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #ifndef FDT_FIXUP_H 8*91f16700Schasinglulu #define FDT_FIXUP_H 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <stdbool.h> 11*91f16700Schasinglulu #include <stddef.h> 12*91f16700Schasinglulu #include <stdint.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #define INVALID_BASE_ADDR ((uintptr_t)~0UL) 15*91f16700Schasinglulu 16*91f16700Schasinglulu struct psci_cpu_idle_state { 17*91f16700Schasinglulu const char *name; 18*91f16700Schasinglulu uint32_t power_state; 19*91f16700Schasinglulu bool local_timer_stop; 20*91f16700Schasinglulu uint32_t entry_latency_us; 21*91f16700Schasinglulu uint32_t exit_latency_us; 22*91f16700Schasinglulu uint32_t min_residency_us; 23*91f16700Schasinglulu uint32_t wakeup_latency_us; 24*91f16700Schasinglulu }; 25*91f16700Schasinglulu 26*91f16700Schasinglulu int dt_add_psci_node(void *fdt); 27*91f16700Schasinglulu int dt_add_psci_cpu_enable_methods(void *fdt); 28*91f16700Schasinglulu int fdt_add_reserved_memory(void *dtb, const char *node_name, 29*91f16700Schasinglulu uintptr_t base, size_t size); 30*91f16700Schasinglulu int fdt_add_cpus_node(void *dtb, unsigned int afflv0, 31*91f16700Schasinglulu unsigned int afflv1, unsigned int afflv2); 32*91f16700Schasinglulu int fdt_add_cpu_idle_states(void *dtb, const struct psci_cpu_idle_state *state); 33*91f16700Schasinglulu int fdt_adjust_gic_redist(void *dtb, unsigned int nr_cores, uintptr_t gicr_base, 34*91f16700Schasinglulu unsigned int gicr_frame_size); 35*91f16700Schasinglulu int fdt_set_mac_address(void *dtb, unsigned int ethernet_idx, 36*91f16700Schasinglulu const uint8_t *mac_addr); 37*91f16700Schasinglulu 38*91f16700Schasinglulu #endif /* FDT_FIXUP_H */ 39