xref: /arm-trusted-firmware/include/common/bl_common.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef BL_COMMON_H
8*91f16700Schasinglulu #define BL_COMMON_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <common/ep_info.h>
11*91f16700Schasinglulu #include <common/param_header.h>
12*91f16700Schasinglulu #include <lib/utils_def.h>
13*91f16700Schasinglulu 
14*91f16700Schasinglulu #ifndef __ASSEMBLER__
15*91f16700Schasinglulu #include <stddef.h>
16*91f16700Schasinglulu #include <stdint.h>
17*91f16700Schasinglulu #include <lib/cassert.h>
18*91f16700Schasinglulu #endif /* __ASSEMBLER__ */
19*91f16700Schasinglulu 
20*91f16700Schasinglulu #include <export/common/bl_common_exp.h>
21*91f16700Schasinglulu 
22*91f16700Schasinglulu #define UP	U(1)
23*91f16700Schasinglulu #define DOWN	U(0)
24*91f16700Schasinglulu 
25*91f16700Schasinglulu /*******************************************************************************
26*91f16700Schasinglulu  * Constants to identify the location of a memory region in a given memory
27*91f16700Schasinglulu  * layout.
28*91f16700Schasinglulu ******************************************************************************/
29*91f16700Schasinglulu #define TOP	U(0x1)
30*91f16700Schasinglulu #define BOTTOM	U(0x0)
31*91f16700Schasinglulu 
32*91f16700Schasinglulu /*******************************************************************************
33*91f16700Schasinglulu  * Constants to indicate type of exception to the common exception handler.
34*91f16700Schasinglulu  ******************************************************************************/
35*91f16700Schasinglulu #define SYNC_EXCEPTION_SP_EL0		U(0x0)
36*91f16700Schasinglulu #define IRQ_SP_EL0			U(0x1)
37*91f16700Schasinglulu #define FIQ_SP_EL0			U(0x2)
38*91f16700Schasinglulu #define SERROR_SP_EL0			U(0x3)
39*91f16700Schasinglulu #define SYNC_EXCEPTION_SP_ELX		U(0x4)
40*91f16700Schasinglulu #define IRQ_SP_ELX			U(0x5)
41*91f16700Schasinglulu #define FIQ_SP_ELX			U(0x6)
42*91f16700Schasinglulu #define SERROR_SP_ELX			U(0x7)
43*91f16700Schasinglulu #define SYNC_EXCEPTION_AARCH64		U(0x8)
44*91f16700Schasinglulu #define IRQ_AARCH64			U(0x9)
45*91f16700Schasinglulu #define FIQ_AARCH64			U(0xa)
46*91f16700Schasinglulu #define SERROR_AARCH64			U(0xb)
47*91f16700Schasinglulu #define SYNC_EXCEPTION_AARCH32		U(0xc)
48*91f16700Schasinglulu #define IRQ_AARCH32			U(0xd)
49*91f16700Schasinglulu #define FIQ_AARCH32			U(0xe)
50*91f16700Schasinglulu #define SERROR_AARCH32			U(0xf)
51*91f16700Schasinglulu 
52*91f16700Schasinglulu /*
53*91f16700Schasinglulu  * Mapping to connect linker symbols from .ld.S with their counterparts
54*91f16700Schasinglulu  * from .scat for the BL31 image
55*91f16700Schasinglulu  */
56*91f16700Schasinglulu #if defined(USE_ARM_LINK)
57*91f16700Schasinglulu #define __BL31_END__			Load$$LR$$LR_END$$Base
58*91f16700Schasinglulu #define __BSS_START__			Load$$LR$$LR_BSS$$Base
59*91f16700Schasinglulu #define __BSS_END__			Load$$LR$$LR_BSS$$Limit
60*91f16700Schasinglulu #define __BSS_SIZE__			Load$$LR$$LR_BSS$$Length
61*91f16700Schasinglulu #define __COHERENT_RAM_START__		Load$$LR$$LR_COHERENT_RAM$$Base
62*91f16700Schasinglulu #define __COHERENT_RAM_END_UNALIGNED__	Load$$__COHERENT_RAM_EPILOGUE_UNALIGNED__$$Base
63*91f16700Schasinglulu #define __COHERENT_RAM_END__		Load$$LR$$LR_COHERENT_RAM$$Limit
64*91f16700Schasinglulu #define __COHERENT_RAM_UNALIGNED_SIZE__	Load$$__COHERENT_RAM__$$Length
65*91f16700Schasinglulu #define __CPU_OPS_START__		Load$$__CPU_OPS__$$Base
66*91f16700Schasinglulu #define __CPU_OPS_END__			Load$$__CPU_OPS__$$Limit
67*91f16700Schasinglulu #define __DATA_START__			Load$$__DATA__$$Base
68*91f16700Schasinglulu #define __DATA_END__			Load$$__DATA__$$Limit
69*91f16700Schasinglulu #define __GOT_START__			Load$$__GOT__$$Base
70*91f16700Schasinglulu #define __GOT_END__			Load$$__GOT__$$Limit
71*91f16700Schasinglulu #define __PERCPU_BAKERY_LOCK_START__	Load$$__BAKERY_LOCKS__$$Base
72*91f16700Schasinglulu #define __PERCPU_BAKERY_LOCK_END__	Load$$__BAKERY_LOCKS_EPILOGUE__$$Base
73*91f16700Schasinglulu #define __PMF_SVC_DESCS_START__		Load$$__PMF_SVC_DESCS__$$Base
74*91f16700Schasinglulu #define __PMF_SVC_DESCS_END__		Load$$__PMF_SVC_DESCS__$$Limit
75*91f16700Schasinglulu #define __PMF_TIMESTAMP_START__		Load$$__PMF_TIMESTAMP__$$Base
76*91f16700Schasinglulu #define __PMF_TIMESTAMP_END__		Load$$__PER_CPU_TIMESTAMPS__$$Limit
77*91f16700Schasinglulu #define __PMF_PERCPU_TIMESTAMP_END__	Load$$__PMF_TIMESTAMP_EPILOGUE__$$Base
78*91f16700Schasinglulu #define __RELA_END__			Load$$__RELA__$$Limit
79*91f16700Schasinglulu #define __RELA_START__			Load$$__RELA__$$Base
80*91f16700Schasinglulu #define __RODATA_START__		Load$$__RODATA__$$Base
81*91f16700Schasinglulu #define __RODATA_END__			Load$$__RODATA_EPILOGUE__$$Base
82*91f16700Schasinglulu #define __RT_SVC_DESCS_START__		Load$$__RT_SVC_DESCS__$$Base
83*91f16700Schasinglulu #define __RT_SVC_DESCS_END__		Load$$__RT_SVC_DESCS__$$Limit
84*91f16700Schasinglulu #if SPMC_AT_EL3
85*91f16700Schasinglulu #define __EL3_LP_DESCS_START__		Load$$__EL3_LP_DESCS__$$Base
86*91f16700Schasinglulu #define __EL3_LP_DESCS_END__		Load$$__EL3_LP_DESCS__$$Limit
87*91f16700Schasinglulu #endif
88*91f16700Schasinglulu #if ENABLE_SPMD_LP
89*91f16700Schasinglulu #define __SPMD_LP_DESCS_START__	Load$$__SPMD_LP_DESCS__$$Base
90*91f16700Schasinglulu #define __SPMD_LP_DESCS_END__		Load$$__SPMD_LP_DESCS__$$Limit
91*91f16700Schasinglulu #endif
92*91f16700Schasinglulu #define __RW_START__			Load$$LR$$LR_RW_DATA$$Base
93*91f16700Schasinglulu #define __RW_END__			Load$$LR$$LR_END$$Base
94*91f16700Schasinglulu #define __SPM_SHIM_EXCEPTIONS_START__	Load$$__SPM_SHIM_EXCEPTIONS__$$Base
95*91f16700Schasinglulu #define __SPM_SHIM_EXCEPTIONS_END__	Load$$__SPM_SHIM_EXCEPTIONS_EPILOGUE__$$Base
96*91f16700Schasinglulu #define __STACKS_START__		Load$$__STACKS__$$Base
97*91f16700Schasinglulu #define __STACKS_END__			Load$$__STACKS__$$Limit
98*91f16700Schasinglulu #define __TEXT_START__			Load$$__TEXT__$$Base
99*91f16700Schasinglulu #define __TEXT_END__			Load$$__TEXT_EPILOGUE__$$Base
100*91f16700Schasinglulu #endif /* USE_ARM_LINK */
101*91f16700Schasinglulu 
102*91f16700Schasinglulu #ifndef __ASSEMBLER__
103*91f16700Schasinglulu 
104*91f16700Schasinglulu /*
105*91f16700Schasinglulu  * Declarations of linker defined symbols to help determine memory layout of
106*91f16700Schasinglulu  * BL images
107*91f16700Schasinglulu  */
108*91f16700Schasinglulu #if SEPARATE_CODE_AND_RODATA
109*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __TEXT_START__,		BL_CODE_BASE);
110*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __TEXT_END__,		BL_CODE_END);
111*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __RODATA_START__,		BL_RO_DATA_BASE);
112*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __RODATA_END__,		BL_RO_DATA_END);
113*91f16700Schasinglulu #else
114*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __RO_START__,		BL_CODE_BASE);
115*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __RO_END__,		BL_CODE_END);
116*91f16700Schasinglulu #endif
117*91f16700Schasinglulu #if SEPARATE_NOBITS_REGION
118*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __NOBITS_START__,		BL_NOBITS_BASE);
119*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __NOBITS_END__,		BL_NOBITS_END);
120*91f16700Schasinglulu #endif
121*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __RW_END__,		BL_END);
122*91f16700Schasinglulu 
123*91f16700Schasinglulu #if defined(IMAGE_BL1)
124*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL1_ROM_END__,		BL1_ROM_END);
125*91f16700Schasinglulu 
126*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL1_RAM_START__,	BL1_RAM_BASE);
127*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL1_RAM_END__,		BL1_RAM_LIMIT);
128*91f16700Schasinglulu #elif defined(IMAGE_BL2)
129*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL2_END__,		BL2_END);
130*91f16700Schasinglulu #elif defined(IMAGE_BL2U)
131*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL2U_END__,		BL2U_END);
132*91f16700Schasinglulu #elif defined(IMAGE_BL31)
133*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL31_START__,		BL31_START);
134*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL31_END__,		BL31_END);
135*91f16700Schasinglulu #elif defined(IMAGE_BL32)
136*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL32_END__,		BL32_END);
137*91f16700Schasinglulu #elif defined(IMAGE_RMM)
138*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __RMM_END__,		RMM_END);
139*91f16700Schasinglulu #endif /* IMAGE_BLX */
140*91f16700Schasinglulu 
141*91f16700Schasinglulu /* The following symbols are only exported from the BL2 at EL3 linker script. */
142*91f16700Schasinglulu #if BL2_IN_XIP_MEM && defined(IMAGE_BL2)
143*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL2_ROM_END__,		BL2_ROM_END);
144*91f16700Schasinglulu 
145*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL2_RAM_START__,	BL2_RAM_BASE);
146*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __BL2_RAM_END__,		BL2_RAM_END);
147*91f16700Schasinglulu #endif /* BL2_IN_XIP_MEM */
148*91f16700Schasinglulu 
149*91f16700Schasinglulu /*
150*91f16700Schasinglulu  * The next 2 constants identify the extents of the coherent memory region.
151*91f16700Schasinglulu  * These addresses are used by the MMU setup code and therefore they must be
152*91f16700Schasinglulu  * page-aligned.  It is the responsibility of the linker script to ensure that
153*91f16700Schasinglulu  * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
154*91f16700Schasinglulu  * page-aligned addresses.
155*91f16700Schasinglulu  */
156*91f16700Schasinglulu #if USE_COHERENT_MEM
157*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__,	BL_COHERENT_RAM_BASE);
158*91f16700Schasinglulu IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__,	BL_COHERENT_RAM_END);
159*91f16700Schasinglulu #endif
160*91f16700Schasinglulu 
161*91f16700Schasinglulu /*******************************************************************************
162*91f16700Schasinglulu  * Structure used for telling the next BL how much of a particular type of
163*91f16700Schasinglulu  * memory is available for its use and how much is already used.
164*91f16700Schasinglulu  ******************************************************************************/
165*91f16700Schasinglulu typedef struct meminfo {
166*91f16700Schasinglulu 	uintptr_t total_base;
167*91f16700Schasinglulu 	size_t total_size;
168*91f16700Schasinglulu } meminfo_t;
169*91f16700Schasinglulu 
170*91f16700Schasinglulu /*******************************************************************************
171*91f16700Schasinglulu  * Function & variable prototypes
172*91f16700Schasinglulu  ******************************************************************************/
173*91f16700Schasinglulu int load_auth_image(unsigned int image_id, image_info_t *image_data);
174*91f16700Schasinglulu 
175*91f16700Schasinglulu #if TRUSTED_BOARD_BOOT && defined(DYN_DISABLE_AUTH)
176*91f16700Schasinglulu /*
177*91f16700Schasinglulu  * API to dynamically disable authentication. Only meant for development
178*91f16700Schasinglulu  * systems.
179*91f16700Schasinglulu  */
180*91f16700Schasinglulu void dyn_disable_auth(void);
181*91f16700Schasinglulu #endif
182*91f16700Schasinglulu 
183*91f16700Schasinglulu extern const char build_message[];
184*91f16700Schasinglulu extern const char version_string[];
185*91f16700Schasinglulu const char *get_version(void);
186*91f16700Schasinglulu 
187*91f16700Schasinglulu void print_entry_point_info(const entry_point_info_t *ep_info);
188*91f16700Schasinglulu uintptr_t page_align(uintptr_t value, unsigned dir);
189*91f16700Schasinglulu 
190*91f16700Schasinglulu struct mmap_region;
191*91f16700Schasinglulu 
192*91f16700Schasinglulu void setup_page_tables(const struct mmap_region *bl_regions,
193*91f16700Schasinglulu 			   const struct mmap_region *plat_regions);
194*91f16700Schasinglulu 
195*91f16700Schasinglulu void bl_handle_pauth(void);
196*91f16700Schasinglulu 
197*91f16700Schasinglulu #endif /*__ASSEMBLER__*/
198*91f16700Schasinglulu 
199*91f16700Schasinglulu #endif /* BL_COMMON_H */
200