xref: /arm-trusted-firmware/include/bl31/interrupt_mgmt.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2014-2022, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef INTERRUPT_MGMT_H
8*91f16700Schasinglulu #define INTERRUPT_MGMT_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu #include <arch.h>
11*91f16700Schasinglulu #include <lib/utils_def.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu /*******************************************************************************
14*91f16700Schasinglulu  * Constants for the types of interrupts recognised by the IM framework
15*91f16700Schasinglulu  ******************************************************************************/
16*91f16700Schasinglulu #define INTR_TYPE_S_EL1			U(0)
17*91f16700Schasinglulu #define INTR_TYPE_EL3			U(1)
18*91f16700Schasinglulu #define INTR_TYPE_NS			U(2)
19*91f16700Schasinglulu #define MAX_INTR_TYPES			U(3)
20*91f16700Schasinglulu #define INTR_TYPE_INVAL			MAX_INTR_TYPES
21*91f16700Schasinglulu 
22*91f16700Schasinglulu /* Interrupt routing modes */
23*91f16700Schasinglulu #define INTR_ROUTING_MODE_PE		0
24*91f16700Schasinglulu #define INTR_ROUTING_MODE_ANY		1
25*91f16700Schasinglulu 
26*91f16700Schasinglulu /*
27*91f16700Schasinglulu  * Constant passed to the interrupt handler in the 'id' field when the
28*91f16700Schasinglulu  * framework does not read the gic registers to determine the interrupt id.
29*91f16700Schasinglulu  */
30*91f16700Schasinglulu #define INTR_ID_UNAVAILABLE		U(0xFFFFFFFF)
31*91f16700Schasinglulu 
32*91f16700Schasinglulu 
33*91f16700Schasinglulu /*******************************************************************************
34*91f16700Schasinglulu  * Mask for _both_ the routing model bits in the 'flags' parameter and
35*91f16700Schasinglulu  * constants to define the valid routing models for each supported interrupt
36*91f16700Schasinglulu  * type
37*91f16700Schasinglulu  ******************************************************************************/
38*91f16700Schasinglulu #define INTR_RM_FLAGS_SHIFT		U(0x0)
39*91f16700Schasinglulu #define INTR_RM_FLAGS_MASK		U(0x3)
40*91f16700Schasinglulu /* Routed to EL3 from NS. Taken to S-EL1 from Secure */
41*91f16700Schasinglulu #define INTR_SEL1_VALID_RM0		U(0x2)
42*91f16700Schasinglulu /* Routed to EL3 from NS and Secure */
43*91f16700Schasinglulu #define INTR_SEL1_VALID_RM1		U(0x3)
44*91f16700Schasinglulu /* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
45*91f16700Schasinglulu #define INTR_NS_VALID_RM0		U(0x0)
46*91f16700Schasinglulu /* Routed to EL1/EL2 from NS and to EL3 from Secure */
47*91f16700Schasinglulu #define INTR_NS_VALID_RM1		U(0x1)
48*91f16700Schasinglulu /* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */
49*91f16700Schasinglulu #define INTR_EL3_VALID_RM0		U(0x2)
50*91f16700Schasinglulu /* Routed to EL3 from NS and Secure */
51*91f16700Schasinglulu #define INTR_EL3_VALID_RM1		U(0x3)
52*91f16700Schasinglulu /* This is the default routing model */
53*91f16700Schasinglulu #define INTR_DEFAULT_RM			U(0x0)
54*91f16700Schasinglulu 
55*91f16700Schasinglulu /*******************************************************************************
56*91f16700Schasinglulu  * Constants for the _individual_ routing model bits in the 'flags' field for
57*91f16700Schasinglulu  * each interrupt type and mask to validate the 'flags' parameter while
58*91f16700Schasinglulu  * registering an interrupt handler
59*91f16700Schasinglulu  ******************************************************************************/
60*91f16700Schasinglulu #define INTR_TYPE_FLAGS_MASK		U(0xFFFFFFFC)
61*91f16700Schasinglulu 
62*91f16700Schasinglulu #define INTR_RM_FROM_SEC_SHIFT		SECURE		/* BIT[0] */
63*91f16700Schasinglulu #define INTR_RM_FROM_NS_SHIFT		NON_SECURE	/* BIT[1] */
64*91f16700Schasinglulu #define INTR_RM_FROM_FLAG_MASK		U(1)
65*91f16700Schasinglulu #define get_interrupt_rm_flag(flag, ss) \
66*91f16700Schasinglulu 	((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
67*91f16700Schasinglulu #define set_interrupt_rm_flag(flag, ss)	((flag) |= U(1) << (ss))
68*91f16700Schasinglulu #define clr_interrupt_rm_flag(flag, ss)	((flag) &= ~(U(1) << (ss)))
69*91f16700Schasinglulu 
70*91f16700Schasinglulu /*******************************************************************************
71*91f16700Schasinglulu  * Macros to set the 'flags' parameter passed to an interrupt type handler. Only
72*91f16700Schasinglulu  * the flag to indicate the security state when the exception was generated is
73*91f16700Schasinglulu  * supported.
74*91f16700Schasinglulu  ******************************************************************************/
75*91f16700Schasinglulu #define INTR_SRC_SS_FLAG_SHIFT		U(0)		/* BIT[0] */
76*91f16700Schasinglulu #define INTR_SRC_SS_FLAG_MASK		U(1)
77*91f16700Schasinglulu #define set_interrupt_src_ss(flag, val)	((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT)
78*91f16700Schasinglulu #define clr_interrupt_src_ss(flag)	((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
79*91f16700Schasinglulu #define get_interrupt_src_ss(flag)	(((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \
80*91f16700Schasinglulu 					 INTR_SRC_SS_FLAG_MASK)
81*91f16700Schasinglulu 
82*91f16700Schasinglulu #ifndef __ASSEMBLER__
83*91f16700Schasinglulu 
84*91f16700Schasinglulu #include <errno.h>
85*91f16700Schasinglulu #include <stdint.h>
86*91f16700Schasinglulu 
87*91f16700Schasinglulu /*******************************************************************************
88*91f16700Schasinglulu  * Helpers to validate the routing model bits in the 'flags' for a type
89*91f16700Schasinglulu  * of interrupt. If the model does not match one of the valid masks
90*91f16700Schasinglulu  * -EINVAL is returned.
91*91f16700Schasinglulu  ******************************************************************************/
92*91f16700Schasinglulu static inline int32_t validate_sel1_interrupt_rm(uint32_t x)
93*91f16700Schasinglulu {
94*91f16700Schasinglulu 	if ((x == INTR_SEL1_VALID_RM0) || (x == INTR_SEL1_VALID_RM1))
95*91f16700Schasinglulu 		return 0;
96*91f16700Schasinglulu 
97*91f16700Schasinglulu 	return -EINVAL;
98*91f16700Schasinglulu }
99*91f16700Schasinglulu 
100*91f16700Schasinglulu static inline int32_t validate_ns_interrupt_rm(uint32_t x)
101*91f16700Schasinglulu {
102*91f16700Schasinglulu 	if ((x == INTR_NS_VALID_RM0) || (x == INTR_NS_VALID_RM1))
103*91f16700Schasinglulu 		return 0;
104*91f16700Schasinglulu 
105*91f16700Schasinglulu 	return -EINVAL;
106*91f16700Schasinglulu }
107*91f16700Schasinglulu 
108*91f16700Schasinglulu static inline int32_t validate_el3_interrupt_rm(uint32_t x)
109*91f16700Schasinglulu {
110*91f16700Schasinglulu #if EL3_EXCEPTION_HANDLING && !(defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1))
111*91f16700Schasinglulu 	/*
112*91f16700Schasinglulu 	 * With EL3 exception handling, EL3 interrupts are always routed to EL3
113*91f16700Schasinglulu 	 * from both Secure and Non-secure, when the SPMC does not live in S-EL2.
114*91f16700Schasinglulu 	 * Therefore INTR_EL3_VALID_RM1 is the only valid routing model.
115*91f16700Schasinglulu 	 */
116*91f16700Schasinglulu 	if (x == INTR_EL3_VALID_RM1)
117*91f16700Schasinglulu 		return 0;
118*91f16700Schasinglulu #else
119*91f16700Schasinglulu 	/*
120*91f16700Schasinglulu 	 * When EL3_EXCEPTION_HANDLING is not defined both routing modes are
121*91f16700Schasinglulu 	 * valid. This is the most common case. The exception to this rule is
122*91f16700Schasinglulu 	 * when EL3_EXCEPTION_HANDLING is defined but also when the SPMC lives
123*91f16700Schasinglulu 	 * at S-EL2. In this case, Group0 Interrupts are trapped to the SPMC
124*91f16700Schasinglulu 	 * when running in S-EL0 and S-EL1. The SPMC may handle the interrupt
125*91f16700Schasinglulu 	 * itself, delegate it to an SP or forward to EL3 for handling.
126*91f16700Schasinglulu 	 */
127*91f16700Schasinglulu 	if ((x == INTR_EL3_VALID_RM0) || (x == INTR_EL3_VALID_RM1))
128*91f16700Schasinglulu 		return 0;
129*91f16700Schasinglulu #endif
130*91f16700Schasinglulu 
131*91f16700Schasinglulu 	return -EINVAL;
132*91f16700Schasinglulu }
133*91f16700Schasinglulu 
134*91f16700Schasinglulu /*******************************************************************************
135*91f16700Schasinglulu  * Prototype for defining a handler for an interrupt type
136*91f16700Schasinglulu  ******************************************************************************/
137*91f16700Schasinglulu typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
138*91f16700Schasinglulu 					     uint32_t flags,
139*91f16700Schasinglulu 					     void *handle,
140*91f16700Schasinglulu 					     void *cookie);
141*91f16700Schasinglulu 
142*91f16700Schasinglulu /*******************************************************************************
143*91f16700Schasinglulu  * Function & variable prototypes
144*91f16700Schasinglulu  ******************************************************************************/
145*91f16700Schasinglulu u_register_t get_scr_el3_from_routing_model(uint32_t security_state);
146*91f16700Schasinglulu int32_t set_routing_model(uint32_t type, uint32_t flags);
147*91f16700Schasinglulu int32_t register_interrupt_type_handler(uint32_t type,
148*91f16700Schasinglulu 					interrupt_type_handler_t handler,
149*91f16700Schasinglulu 					uint32_t flags);
150*91f16700Schasinglulu interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
151*91f16700Schasinglulu int disable_intr_rm_local(uint32_t type, uint32_t security_state);
152*91f16700Schasinglulu int enable_intr_rm_local(uint32_t type, uint32_t security_state);
153*91f16700Schasinglulu 
154*91f16700Schasinglulu #endif /*__ASSEMBLER__*/
155*91f16700Schasinglulu #endif /* INTERRUPT_MGMT_H */
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