xref: /arm-trusted-firmware/fdts/stm32mp257f-ev1.dts (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
2*91f16700Schasinglulu/*
3*91f16700Schasinglulu * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
4*91f16700Schasinglulu * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5*91f16700Schasinglulu */
6*91f16700Schasinglulu
7*91f16700Schasinglulu/dts-v1/;
8*91f16700Schasinglulu
9*91f16700Schasinglulu#include "stm32mp257.dtsi"
10*91f16700Schasinglulu#include "stm32mp25xf.dtsi"
11*91f16700Schasinglulu#include "stm32mp25-pinctrl.dtsi"
12*91f16700Schasinglulu#include "stm32mp25xxai-pinctrl.dtsi"
13*91f16700Schasinglulu
14*91f16700Schasinglulu/ {
15*91f16700Schasinglulu	model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
16*91f16700Schasinglulu	compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
17*91f16700Schasinglulu
18*91f16700Schasinglulu	aliases {
19*91f16700Schasinglulu		serial0 = &usart2;
20*91f16700Schasinglulu	};
21*91f16700Schasinglulu
22*91f16700Schasinglulu	chosen {
23*91f16700Schasinglulu		stdout-path = "serial0:115200n8";
24*91f16700Schasinglulu	};
25*91f16700Schasinglulu
26*91f16700Schasinglulu	memory@80000000 {
27*91f16700Schasinglulu		device_type = "memory";
28*91f16700Schasinglulu		reg = <0x0 0x80000000 0x1 0x0>;
29*91f16700Schasinglulu	};
30*91f16700Schasinglulu};
31*91f16700Schasinglulu
32*91f16700Schasinglulu&usart2 {
33*91f16700Schasinglulu	pinctrl-names = "default";
34*91f16700Schasinglulu	pinctrl-0 = <&usart2_pins_a>;
35*91f16700Schasinglulu	status = "okay";
36*91f16700Schasinglulu};
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