1*91f16700Schasinglulu// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause 2*91f16700Schasinglulu/* 3*91f16700Schasinglulu * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 4*91f16700Schasinglulu * Copyright (C) 2022 DH electronics GmbH 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu/ { 8*91f16700Schasinglulu aliases { 9*91f16700Schasinglulu serial0 = &uart4; 10*91f16700Schasinglulu serial1 = &usart3; 11*91f16700Schasinglulu }; 12*91f16700Schasinglulu 13*91f16700Schasinglulu chosen { 14*91f16700Schasinglulu stdout-path = "serial0:115200n8"; 15*91f16700Schasinglulu }; 16*91f16700Schasinglulu}; 17*91f16700Schasinglulu 18*91f16700Schasinglulu&usart3 { 19*91f16700Schasinglulu pinctrl-names = "default"; 20*91f16700Schasinglulu pinctrl-0 = <&usart3_pins_a>; 21*91f16700Schasinglulu status = "okay"; 22*91f16700Schasinglulu}; 23*91f16700Schasinglulu 24*91f16700Schasinglulu&usbotg_hs { 25*91f16700Schasinglulu dr_mode = "otg"; 26*91f16700Schasinglulu pinctrl-0 = <&usbotg_hs_pins_a>; 27*91f16700Schasinglulu pinctrl-names = "default"; 28*91f16700Schasinglulu phy-names = "usb2-phy"; 29*91f16700Schasinglulu phys = <&usbphyc_port1 0>; 30*91f16700Schasinglulu vbus-supply = <&vbus_otg>; 31*91f16700Schasinglulu status = "okay"; 32*91f16700Schasinglulu}; 33*91f16700Schasinglulu 34*91f16700Schasinglulu&usbphyc { 35*91f16700Schasinglulu status = "okay"; 36*91f16700Schasinglulu}; 37*91f16700Schasinglulu 38*91f16700Schasinglulu&usbphyc_port0 { 39*91f16700Schasinglulu phy-supply = <&vdd_usb>; 40*91f16700Schasinglulu}; 41*91f16700Schasinglulu 42*91f16700Schasinglulu&usbphyc_port1 { 43*91f16700Schasinglulu phy-supply = <&vdd_usb>; 44*91f16700Schasinglulu}; 45