1*91f16700Schasinglulu// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*91f16700Schasinglulu/* 3*91f16700Schasinglulu * Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved 4*91f16700Schasinglulu * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics. 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu/dts-v1/; 7*91f16700Schasinglulu 8*91f16700Schasinglulu#include "stm32mp157c-ed1.dts" 9*91f16700Schasinglulu 10*91f16700Schasinglulu/ { 11*91f16700Schasinglulu model = "STMicroelectronics STM32MP157C eval daughter on eval mother"; 12*91f16700Schasinglulu compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157"; 13*91f16700Schasinglulu 14*91f16700Schasinglulu aliases { 15*91f16700Schasinglulu serial1 = &usart3; 16*91f16700Schasinglulu }; 17*91f16700Schasinglulu 18*91f16700Schasinglulu chosen { 19*91f16700Schasinglulu stdout-path = "serial0:115200n8"; 20*91f16700Schasinglulu }; 21*91f16700Schasinglulu}; 22*91f16700Schasinglulu 23*91f16700Schasinglulu&fmc { 24*91f16700Schasinglulu pinctrl-names = "default"; 25*91f16700Schasinglulu pinctrl-0 = <&fmc_pins_a>; 26*91f16700Schasinglulu status = "okay"; 27*91f16700Schasinglulu 28*91f16700Schasinglulu nand-controller@4,0 { 29*91f16700Schasinglulu status = "okay"; 30*91f16700Schasinglulu 31*91f16700Schasinglulu nand@0 { 32*91f16700Schasinglulu reg = <0>; 33*91f16700Schasinglulu nand-on-flash-bbt; 34*91f16700Schasinglulu #address-cells = <1>; 35*91f16700Schasinglulu #size-cells = <1>; 36*91f16700Schasinglulu }; 37*91f16700Schasinglulu }; 38*91f16700Schasinglulu}; 39*91f16700Schasinglulu 40*91f16700Schasinglulu&qspi { 41*91f16700Schasinglulu pinctrl-names = "default"; 42*91f16700Schasinglulu pinctrl-0 = <&qspi_clk_pins_a 43*91f16700Schasinglulu &qspi_bk1_pins_a 44*91f16700Schasinglulu &qspi_cs1_pins_a>; 45*91f16700Schasinglulu reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; 46*91f16700Schasinglulu #address-cells = <1>; 47*91f16700Schasinglulu #size-cells = <0>; 48*91f16700Schasinglulu status = "okay"; 49*91f16700Schasinglulu 50*91f16700Schasinglulu flash0: flash@0 { 51*91f16700Schasinglulu compatible = "jedec,spi-nor"; 52*91f16700Schasinglulu reg = <0>; 53*91f16700Schasinglulu spi-rx-bus-width = <4>; 54*91f16700Schasinglulu spi-max-frequency = <108000000>; 55*91f16700Schasinglulu #address-cells = <1>; 56*91f16700Schasinglulu #size-cells = <1>; 57*91f16700Schasinglulu }; 58*91f16700Schasinglulu}; 59*91f16700Schasinglulu 60*91f16700Schasinglulu&usart3 { 61*91f16700Schasinglulu pinctrl-names = "default"; 62*91f16700Schasinglulu pinctrl-0 = <&usart3_pins_b>; 63*91f16700Schasinglulu uart-has-rtscts; 64*91f16700Schasinglulu status = "disabled"; 65*91f16700Schasinglulu}; 66