xref: /arm-trusted-firmware/fdts/stm32mp13-pinctrl.dtsi (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2*91f16700Schasinglulu/*
3*91f16700Schasinglulu * Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved
4*91f16700Schasinglulu * Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
5*91f16700Schasinglulu */
6*91f16700Schasinglulu#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7*91f16700Schasinglulu
8*91f16700Schasinglulu&pinctrl {
9*91f16700Schasinglulu	/omit-if-no-ref/
10*91f16700Schasinglulu	i2c4_pins_a: i2c4-0 {
11*91f16700Schasinglulu		pins {
12*91f16700Schasinglulu			pinmux = <STM32_PINMUX('E', 15, AF6)>, /* I2C4_SCL */
13*91f16700Schasinglulu				 <STM32_PINMUX('B', 9, AF6)>; /* I2C4_SDA */
14*91f16700Schasinglulu			bias-disable;
15*91f16700Schasinglulu			drive-open-drain;
16*91f16700Schasinglulu			slew-rate = <0>;
17*91f16700Schasinglulu		};
18*91f16700Schasinglulu	};
19*91f16700Schasinglulu
20*91f16700Schasinglulu	/omit-if-no-ref/
21*91f16700Schasinglulu	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
22*91f16700Schasinglulu		pins {
23*91f16700Schasinglulu			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
24*91f16700Schasinglulu				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
25*91f16700Schasinglulu				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
26*91f16700Schasinglulu				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
27*91f16700Schasinglulu				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
28*91f16700Schasinglulu			slew-rate = <1>;
29*91f16700Schasinglulu			drive-push-pull;
30*91f16700Schasinglulu			bias-disable;
31*91f16700Schasinglulu		};
32*91f16700Schasinglulu	};
33*91f16700Schasinglulu
34*91f16700Schasinglulu	/omit-if-no-ref/
35*91f16700Schasinglulu	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
36*91f16700Schasinglulu		pins {
37*91f16700Schasinglulu			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
38*91f16700Schasinglulu			slew-rate = <1>;
39*91f16700Schasinglulu			drive-push-pull;
40*91f16700Schasinglulu			bias-disable;
41*91f16700Schasinglulu		};
42*91f16700Schasinglulu	};
43*91f16700Schasinglulu
44*91f16700Schasinglulu	/omit-if-no-ref/
45*91f16700Schasinglulu	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
46*91f16700Schasinglulu		pins {
47*91f16700Schasinglulu			pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
48*91f16700Schasinglulu				 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
49*91f16700Schasinglulu				 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
50*91f16700Schasinglulu				 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
51*91f16700Schasinglulu				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
52*91f16700Schasinglulu			slew-rate = <1>;
53*91f16700Schasinglulu			drive-push-pull;
54*91f16700Schasinglulu			bias-pull-up;
55*91f16700Schasinglulu		};
56*91f16700Schasinglulu	};
57*91f16700Schasinglulu
58*91f16700Schasinglulu	/omit-if-no-ref/
59*91f16700Schasinglulu	sdmmc2_clk_pins_a: sdmmc2-clk-0 {
60*91f16700Schasinglulu		pins {
61*91f16700Schasinglulu			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
62*91f16700Schasinglulu			slew-rate = <1>;
63*91f16700Schasinglulu			drive-push-pull;
64*91f16700Schasinglulu			bias-pull-up;
65*91f16700Schasinglulu		};
66*91f16700Schasinglulu	};
67*91f16700Schasinglulu
68*91f16700Schasinglulu	/omit-if-no-ref/
69*91f16700Schasinglulu	uart4_pins_a: uart4-0 {
70*91f16700Schasinglulu		pins1 {
71*91f16700Schasinglulu			pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
72*91f16700Schasinglulu			bias-disable;
73*91f16700Schasinglulu			drive-push-pull;
74*91f16700Schasinglulu			slew-rate = <0>;
75*91f16700Schasinglulu		};
76*91f16700Schasinglulu		pins2 {
77*91f16700Schasinglulu			pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
78*91f16700Schasinglulu			bias-disable;
79*91f16700Schasinglulu		};
80*91f16700Schasinglulu	};
81*91f16700Schasinglulu
82*91f16700Schasinglulu	/omit-if-no-ref/
83*91f16700Schasinglulu	usart1_pins_a: usart1-0 {
84*91f16700Schasinglulu		pins1 {
85*91f16700Schasinglulu			pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */
86*91f16700Schasinglulu				 <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */
87*91f16700Schasinglulu			bias-disable;
88*91f16700Schasinglulu			drive-push-pull;
89*91f16700Schasinglulu			slew-rate = <0>;
90*91f16700Schasinglulu		};
91*91f16700Schasinglulu		pins2 {
92*91f16700Schasinglulu			pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
93*91f16700Schasinglulu				 <STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */
94*91f16700Schasinglulu			bias-pull-up;
95*91f16700Schasinglulu		};
96*91f16700Schasinglulu	};
97*91f16700Schasinglulu
98*91f16700Schasinglulu	/omit-if-no-ref/
99*91f16700Schasinglulu	uart8_pins_a: uart8-0 {
100*91f16700Schasinglulu		pins1 {
101*91f16700Schasinglulu			pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
102*91f16700Schasinglulu			bias-disable;
103*91f16700Schasinglulu			drive-push-pull;
104*91f16700Schasinglulu			slew-rate = <0>;
105*91f16700Schasinglulu		};
106*91f16700Schasinglulu		pins2 {
107*91f16700Schasinglulu			pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */
108*91f16700Schasinglulu			bias-pull-up;
109*91f16700Schasinglulu		};
110*91f16700Schasinglulu	};
111*91f16700Schasinglulu};
112