xref: /arm-trusted-firmware/drivers/renesas/rzg/board/board.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <stdint.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <lib/mmio.h>
10*91f16700Schasinglulu #include <lib/utils_def.h>
11*91f16700Schasinglulu 
12*91f16700Schasinglulu #include "board.h"
13*91f16700Schasinglulu #include "rcar_def.h"
14*91f16700Schasinglulu 
15*91f16700Schasinglulu #ifndef BOARD_DEFAULT
16*91f16700Schasinglulu #if (RCAR_LSI == RZ_G2H)
17*91f16700Schasinglulu #define BOARD_DEFAULT		(BOARD_HIHOPE_RZ_G2H << BOARD_CODE_SHIFT)
18*91f16700Schasinglulu #elif (RCAR_LSI == RZ_G2N)
19*91f16700Schasinglulu #define BOARD_DEFAULT		(BOARD_HIHOPE_RZ_G2N << BOARD_CODE_SHIFT)
20*91f16700Schasinglulu #elif (RCAR_LSI == RZ_G2E)
21*91f16700Schasinglulu #define BOARD_DEFAULT		(BOARD_EK874_RZ_G2E << BOARD_CODE_SHIFT)
22*91f16700Schasinglulu #else
23*91f16700Schasinglulu #define BOARD_DEFAULT		(BOARD_HIHOPE_RZ_G2M << BOARD_CODE_SHIFT)
24*91f16700Schasinglulu #endif /* RCAR_LSI == RZ_G2H */
25*91f16700Schasinglulu #endif /* BOARD_DEFAULT */
26*91f16700Schasinglulu 
27*91f16700Schasinglulu #define BOARD_CODE_MASK		(0xF8U)
28*91f16700Schasinglulu #define BOARD_REV_MASK		(0x07U)
29*91f16700Schasinglulu #define BOARD_CODE_SHIFT	(0x03)
30*91f16700Schasinglulu #define BOARD_ID_UNKNOWN	(0xFFU)
31*91f16700Schasinglulu 
32*91f16700Schasinglulu #define GPIO_INDT5	0xE605500C
33*91f16700Schasinglulu #define GP5_19_BIT	(0x01U << 19)
34*91f16700Schasinglulu #define GP5_21_BIT	(0x01U << 21)
35*91f16700Schasinglulu #define GP5_25_BIT	(0x01U << 25)
36*91f16700Schasinglulu 
37*91f16700Schasinglulu #define HM_ID	{ 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
38*91f16700Schasinglulu #define HH_ID	HM_ID
39*91f16700Schasinglulu #define HN_ID	{ 0x20U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU }
40*91f16700Schasinglulu #define EK_ID	HM_ID
41*91f16700Schasinglulu 
42*91f16700Schasinglulu const char *g_board_tbl[] = {
43*91f16700Schasinglulu 	[BOARD_HIHOPE_RZ_G2M] = "HiHope RZ/G2M",
44*91f16700Schasinglulu 	[BOARD_HIHOPE_RZ_G2H] = "HiHope RZ/G2H",
45*91f16700Schasinglulu 	[BOARD_HIHOPE_RZ_G2N] = "HiHope RZ/G2N",
46*91f16700Schasinglulu 	[BOARD_EK874_RZ_G2E] = "EK874 RZ/G2E",
47*91f16700Schasinglulu 	[BOARD_UNKNOWN] = "unknown"
48*91f16700Schasinglulu };
49*91f16700Schasinglulu 
50*91f16700Schasinglulu void rzg_get_board_type(uint32_t *type, uint32_t *rev)
51*91f16700Schasinglulu {
52*91f16700Schasinglulu 	static uint8_t board_id = BOARD_ID_UNKNOWN;
53*91f16700Schasinglulu 	const uint8_t board_tbl[][8] = {
54*91f16700Schasinglulu 		[BOARD_HIHOPE_RZ_G2M] = HM_ID,
55*91f16700Schasinglulu 		[BOARD_HIHOPE_RZ_G2H] = HH_ID,
56*91f16700Schasinglulu 		[BOARD_HIHOPE_RZ_G2N] = HN_ID,
57*91f16700Schasinglulu 		[BOARD_EK874_RZ_G2E] = EK_ID,
58*91f16700Schasinglulu 	};
59*91f16700Schasinglulu 	uint32_t reg;
60*91f16700Schasinglulu #if (RCAR_LSI != RZ_G2E)
61*91f16700Schasinglulu 	uint32_t boardInfo;
62*91f16700Schasinglulu #endif /* RCAR_LSI == RZ_G2E */
63*91f16700Schasinglulu 
64*91f16700Schasinglulu 	if (board_id == BOARD_ID_UNKNOWN) {
65*91f16700Schasinglulu 		board_id = BOARD_DEFAULT;
66*91f16700Schasinglulu 	}
67*91f16700Schasinglulu 
68*91f16700Schasinglulu 	*type = ((uint32_t) board_id & BOARD_CODE_MASK) >> BOARD_CODE_SHIFT;
69*91f16700Schasinglulu 
70*91f16700Schasinglulu 	if (*type >= ARRAY_SIZE(board_tbl)) {
71*91f16700Schasinglulu 		/* no revision information, set Rev0.0. */
72*91f16700Schasinglulu 		*rev = 0;
73*91f16700Schasinglulu 		return;
74*91f16700Schasinglulu 	}
75*91f16700Schasinglulu 
76*91f16700Schasinglulu 	reg = mmio_read_32(RCAR_PRR);
77*91f16700Schasinglulu #if (RCAR_LSI == RZ_G2E)
78*91f16700Schasinglulu 	if (reg & RCAR_MINOR_MASK) {
79*91f16700Schasinglulu 		*rev = 0x30U;
80*91f16700Schasinglulu 	} else {
81*91f16700Schasinglulu 		*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
82*91f16700Schasinglulu 	}
83*91f16700Schasinglulu #else
84*91f16700Schasinglulu 	if ((reg & PRR_CUT_MASK) == RCAR_M3_CUT_VER11) {
85*91f16700Schasinglulu 		*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
86*91f16700Schasinglulu 	} else {
87*91f16700Schasinglulu 		reg = mmio_read_32(GPIO_INDT5);
88*91f16700Schasinglulu 		if (reg & GP5_25_BIT) {
89*91f16700Schasinglulu 			*rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)];
90*91f16700Schasinglulu 		} else {
91*91f16700Schasinglulu 			boardInfo = reg & (GP5_19_BIT | GP5_21_BIT);
92*91f16700Schasinglulu 			*rev = (((boardInfo & GP5_19_BIT) >> 14) |
93*91f16700Schasinglulu 				((boardInfo & GP5_21_BIT) >> 17)) + 0x30U;
94*91f16700Schasinglulu 		}
95*91f16700Schasinglulu 	}
96*91f16700Schasinglulu #endif /* RCAR_LSI == RZ_G2E */
97*91f16700Schasinglulu }
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