1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2015-2019, Renesas Electronics Corporation 3*91f16700Schasinglulu * All rights reserved. 4*91f16700Schasinglulu * 5*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <stdint.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <common/debug.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu #include "../qos_common.h" 13*91f16700Schasinglulu #include "../qos_reg.h" 14*91f16700Schasinglulu #include "qos_init_v3m.h" 15*91f16700Schasinglulu 16*91f16700Schasinglulu #define RCAR_QOS_VERSION "rev.0.01" 17*91f16700Schasinglulu 18*91f16700Schasinglulu #include "qos_init_v3m_mstat.h" 19*91f16700Schasinglulu 20*91f16700Schasinglulu struct rcar_gen3_dbsc_qos_settings v3m_qos[] = { 21*91f16700Schasinglulu /* BUFCAM settings */ 22*91f16700Schasinglulu { DBSC_DBCAM0CNF1, 0x00044218 }, 23*91f16700Schasinglulu { DBSC_DBCAM0CNF2, 0x000000F4 }, 24*91f16700Schasinglulu { DBSC_DBSCHCNT0, 0x080F003F }, 25*91f16700Schasinglulu { DBSC_DBSCHCNT1, 0x00001010 }, 26*91f16700Schasinglulu 27*91f16700Schasinglulu { DBSC_DBSCHSZ0, 0x00000001 }, 28*91f16700Schasinglulu { DBSC_DBSCHRW0, 0x22421111 }, 29*91f16700Schasinglulu { DBSC_DBSCHRW1, 0x00180034 }, 30*91f16700Schasinglulu { DBSC_SCFCTST0, 0x180B1708 }, 31*91f16700Schasinglulu { DBSC_SCFCTST1, 0x0808070C }, 32*91f16700Schasinglulu { DBSC_SCFCTST2, 0x012F1123 }, 33*91f16700Schasinglulu 34*91f16700Schasinglulu /* QoS Settings */ 35*91f16700Schasinglulu { DBSC_DBSCHQOS00, 0x0000F000 }, 36*91f16700Schasinglulu { DBSC_DBSCHQOS01, 0x0000E000 }, 37*91f16700Schasinglulu { DBSC_DBSCHQOS02, 0x00007000 }, 38*91f16700Schasinglulu { DBSC_DBSCHQOS03, 0x00000000 }, 39*91f16700Schasinglulu { DBSC_DBSCHQOS40, 0x0000F000 }, 40*91f16700Schasinglulu { DBSC_DBSCHQOS41, 0x0000EFFF }, 41*91f16700Schasinglulu { DBSC_DBSCHQOS42, 0x0000B000 }, 42*91f16700Schasinglulu { DBSC_DBSCHQOS43, 0x00000000 }, 43*91f16700Schasinglulu { DBSC_DBSCHQOS90, 0x0000F000 }, 44*91f16700Schasinglulu { DBSC_DBSCHQOS91, 0x0000EFFF }, 45*91f16700Schasinglulu { DBSC_DBSCHQOS92, 0x0000D000 }, 46*91f16700Schasinglulu { DBSC_DBSCHQOS93, 0x00000000 }, 47*91f16700Schasinglulu { DBSC_DBSCHQOS130, 0x0000F000 }, 48*91f16700Schasinglulu { DBSC_DBSCHQOS131, 0x0000EFFF }, 49*91f16700Schasinglulu { DBSC_DBSCHQOS132, 0x0000E800 }, 50*91f16700Schasinglulu { DBSC_DBSCHQOS133, 0x00007000 }, 51*91f16700Schasinglulu { DBSC_DBSCHQOS140, 0x0000F000 }, 52*91f16700Schasinglulu { DBSC_DBSCHQOS141, 0x0000EFFF }, 53*91f16700Schasinglulu { DBSC_DBSCHQOS142, 0x0000E800 }, 54*91f16700Schasinglulu { DBSC_DBSCHQOS143, 0x0000B000 }, 55*91f16700Schasinglulu { DBSC_DBSCHQOS150, 0x000007D0 }, 56*91f16700Schasinglulu { DBSC_DBSCHQOS151, 0x000007CF }, 57*91f16700Schasinglulu { DBSC_DBSCHQOS152, 0x000005D0 }, 58*91f16700Schasinglulu { DBSC_DBSCHQOS153, 0x000003D0 }, 59*91f16700Schasinglulu }; 60*91f16700Schasinglulu 61*91f16700Schasinglulu void qos_init_v3m(void) 62*91f16700Schasinglulu { 63*91f16700Schasinglulu return; 64*91f16700Schasinglulu 65*91f16700Schasinglulu rcar_qos_dbsc_setting(v3m_qos, ARRAY_SIZE(v3m_qos), false); 66*91f16700Schasinglulu 67*91f16700Schasinglulu #if !(RCAR_QOS_TYPE == RCAR_QOS_NONE) 68*91f16700Schasinglulu #if RCAR_QOS_TYPE == RCAR_QOS_TYPE_DEFAULT 69*91f16700Schasinglulu NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); 70*91f16700Schasinglulu #endif 71*91f16700Schasinglulu 72*91f16700Schasinglulu /* Resource Alloc setting */ 73*91f16700Schasinglulu io_write_32(QOSCTRL_RAS, 0x00000020U); 74*91f16700Schasinglulu io_write_32(QOSCTRL_FIXTH, 0x000F0005U); 75*91f16700Schasinglulu io_write_32(QOSCTRL_REGGD, 0x00000004U); 76*91f16700Schasinglulu io_write_64(QOSCTRL_DANN, 0x0202020104040200U); 77*91f16700Schasinglulu io_write_32(QOSCTRL_DANT, 0x00201008U); 78*91f16700Schasinglulu io_write_32(QOSCTRL_EC, 0x00080001U); /* need for H3 ES1 */ 79*91f16700Schasinglulu io_write_64(QOSCTRL_EMS, 0x0000000000000000U); 80*91f16700Schasinglulu io_write_32(QOSCTRL_INSFC, 0x63C20001U); 81*91f16700Schasinglulu io_write_32(QOSCTRL_BERR, 0x00000000U); 82*91f16700Schasinglulu 83*91f16700Schasinglulu /* QOSBW setting */ 84*91f16700Schasinglulu io_write_32(QOSCTRL_SL_INIT, 0x0305007DU); 85*91f16700Schasinglulu io_write_32(QOSCTRL_REF_ARS, 0x00330000U); 86*91f16700Schasinglulu 87*91f16700Schasinglulu /* QOSBW SRAM setting */ 88*91f16700Schasinglulu uint32_t i; 89*91f16700Schasinglulu 90*91f16700Schasinglulu for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) { 91*91f16700Schasinglulu io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]); 92*91f16700Schasinglulu io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]); 93*91f16700Schasinglulu } 94*91f16700Schasinglulu for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) { 95*91f16700Schasinglulu io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]); 96*91f16700Schasinglulu io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]); 97*91f16700Schasinglulu } 98*91f16700Schasinglulu 99*91f16700Schasinglulu /* AXI-IF arbitration setting */ 100*91f16700Schasinglulu io_write_32(DBSC_AXARB, 0x18010000U); 101*91f16700Schasinglulu 102*91f16700Schasinglulu /* Resource Alloc start */ 103*91f16700Schasinglulu io_write_32(QOSCTRL_RAEN, 0x00000001U); 104*91f16700Schasinglulu 105*91f16700Schasinglulu /* QOSBW start */ 106*91f16700Schasinglulu io_write_32(QOSCTRL_STATQC, 0x00000001U); 107*91f16700Schasinglulu 108*91f16700Schasinglulu #else 109*91f16700Schasinglulu NOTICE("BL2: QoS is None\n"); 110*91f16700Schasinglulu #endif /* !(RCAR_QOS_TYPE == RCAR_QOS_NONE) */ 111*91f16700Schasinglulu } 112