1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright (c) 2018-2021, Renesas Electronics Corporation. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu #include <lib/mmio.h> 8*91f16700Schasinglulu 9*91f16700Schasinglulu #include "cpg_registers.h" 10*91f16700Schasinglulu #include "rcar_private.h" 11*91f16700Schasinglulu 12*91f16700Schasinglulu #if IMAGE_BL31 13*91f16700Schasinglulu void __attribute__ ((section(".system_ram"))) cpg_write(uintptr_t regadr, uint32_t regval) 14*91f16700Schasinglulu #else 15*91f16700Schasinglulu void cpg_write(uintptr_t regadr, uint32_t regval) 16*91f16700Schasinglulu #endif 17*91f16700Schasinglulu { 18*91f16700Schasinglulu uint32_t value = regval; 19*91f16700Schasinglulu 20*91f16700Schasinglulu mmio_write_32(CPG_CPGWPR, ~value); 21*91f16700Schasinglulu mmio_write_32(regadr, value); 22*91f16700Schasinglulu } 23*91f16700Schasinglulu 24*91f16700Schasinglulu #if IMAGE_BL31 25*91f16700Schasinglulu void __attribute__ ((section(".system_ram"))) mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, 26*91f16700Schasinglulu uint32_t target_bit) 27*91f16700Schasinglulu #else 28*91f16700Schasinglulu void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit) 29*91f16700Schasinglulu #endif 30*91f16700Schasinglulu { 31*91f16700Schasinglulu uint32_t reg; 32*91f16700Schasinglulu 33*91f16700Schasinglulu reg = mmio_read_32(mstpcr); 34*91f16700Schasinglulu reg &= ~target_bit; 35*91f16700Schasinglulu cpg_write(mstpcr, reg); 36*91f16700Schasinglulu while ((mmio_read_32(mstpsr) & target_bit) != 0U) { 37*91f16700Schasinglulu } 38*91f16700Schasinglulu } 39