xref: /arm-trusted-firmware/drivers/nxp/interconnect/ls_cci.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright 2020 NXP
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  *
6*91f16700Schasinglulu  */
7*91f16700Schasinglulu 
8*91f16700Schasinglulu #include <arch.h>
9*91f16700Schasinglulu #include <cci.h>
10*91f16700Schasinglulu 
11*91f16700Schasinglulu #include <plat_arm.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu /******************************************************************************
14*91f16700Schasinglulu  * The following functions are defined as weak to allow a platform to override
15*91f16700Schasinglulu  * the way ARM CCI driver is initialised and used.
16*91f16700Schasinglulu  *****************************************************************************/
17*91f16700Schasinglulu #pragma weak plat_arm_interconnect_enter_coherency
18*91f16700Schasinglulu #pragma weak plat_arm_interconnect_exit_coherency
19*91f16700Schasinglulu 
20*91f16700Schasinglulu /******************************************************************************
21*91f16700Schasinglulu  * Helper function to place current master into coherency
22*91f16700Schasinglulu  *****************************************************************************/
23*91f16700Schasinglulu void plat_ls_interconnect_enter_coherency(unsigned int num_clusters)
24*91f16700Schasinglulu {
25*91f16700Schasinglulu 	cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
26*91f16700Schasinglulu 
27*91f16700Schasinglulu 	for (uint32_t index = 1U; index < num_clusters; index++) {
28*91f16700Schasinglulu 		cci_enable_snoop_dvm_reqs(index);
29*91f16700Schasinglulu 	}
30*91f16700Schasinglulu }
31*91f16700Schasinglulu 
32*91f16700Schasinglulu /******************************************************************************
33*91f16700Schasinglulu  * Helper function to remove current master from coherency
34*91f16700Schasinglulu  *****************************************************************************/
35*91f16700Schasinglulu void plat_ls_interconnect_exit_coherency(void)
36*91f16700Schasinglulu {
37*91f16700Schasinglulu 	cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
38*91f16700Schasinglulu }
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