1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright 2021 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <stdint.h> 9*91f16700Schasinglulu #include <stdio.h> 10*91f16700Schasinglulu 11*91f16700Schasinglulu #include <common/debug.h> 12*91f16700Schasinglulu #include <flash_info.h> 13*91f16700Schasinglulu #include "fspi.h" 14*91f16700Schasinglulu #include <fspi_api.h> 15*91f16700Schasinglulu 16*91f16700Schasinglulu /* 17*91f16700Schasinglulu * The macros are defined to be used as test vector for testing fspi. 18*91f16700Schasinglulu */ 19*91f16700Schasinglulu #define SIZE_BUFFER 0x250 20*91f16700Schasinglulu 21*91f16700Schasinglulu /* 22*91f16700Schasinglulu * You may choose fspi_swap based on core endianness and flexspi IP/AHB 23*91f16700Schasinglulu * buffer endianness set in MCR. 24*91f16700Schasinglulu */ 25*91f16700Schasinglulu #define fspi_swap32(A) (A) 26*91f16700Schasinglulu 27*91f16700Schasinglulu void fspi_test(uint32_t fspi_test_addr, uint32_t size, int extra) 28*91f16700Schasinglulu { 29*91f16700Schasinglulu uint32_t buffer[SIZE_BUFFER]; 30*91f16700Schasinglulu uint32_t count = 1; 31*91f16700Schasinglulu uint32_t failed, i; 32*91f16700Schasinglulu 33*91f16700Schasinglulu NOTICE("-------------------------- %d----------------------------------\n", count++); 34*91f16700Schasinglulu INFO("Sector Erase size: 0x%08x, size: %d\n", F_SECTOR_ERASE_SZ, size); 35*91f16700Schasinglulu /* Test Sector Erase */ 36*91f16700Schasinglulu xspi_sector_erase(fspi_test_addr - fspi_test_addr % F_SECTOR_ERASE_SZ, 37*91f16700Schasinglulu F_SECTOR_ERASE_SZ); 38*91f16700Schasinglulu 39*91f16700Schasinglulu /* Test Erased data using IP read */ 40*91f16700Schasinglulu xspi_ip_read((fspi_test_addr), buffer, size * 4); 41*91f16700Schasinglulu 42*91f16700Schasinglulu failed = 0; 43*91f16700Schasinglulu for (i = 0; i < size; i++) 44*91f16700Schasinglulu if (fspi_swap32(0xffffffff) != buffer[i]) { 45*91f16700Schasinglulu failed = 1; 46*91f16700Schasinglulu break; 47*91f16700Schasinglulu } 48*91f16700Schasinglulu 49*91f16700Schasinglulu if (failed == 0) { 50*91f16700Schasinglulu NOTICE("[%d]: Success Erase: data in buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i-3]); 51*91f16700Schasinglulu } else { 52*91f16700Schasinglulu ERROR("Erase: Failed -->xxx with buffer[%d]=0x%08x\n", i, buffer[i]); 53*91f16700Schasinglulu } 54*91f16700Schasinglulu 55*91f16700Schasinglulu for (i = 0; i < SIZE_BUFFER; i++) 56*91f16700Schasinglulu buffer[i] = 0x12345678; 57*91f16700Schasinglulu 58*91f16700Schasinglulu /* Write data from buffer to flash */ 59*91f16700Schasinglulu xspi_write(fspi_test_addr, (void *)buffer, (size * 4 + extra)); 60*91f16700Schasinglulu /* Check written data using IP read */ 61*91f16700Schasinglulu xspi_ip_read(fspi_test_addr, buffer, (size * 4 + extra)); 62*91f16700Schasinglulu failed = 0; 63*91f16700Schasinglulu for (i = 0; i < size; i++) 64*91f16700Schasinglulu if (fspi_swap32(0x12345678) != buffer[i]) { 65*91f16700Schasinglulu failed = 1; 66*91f16700Schasinglulu break; 67*91f16700Schasinglulu } 68*91f16700Schasinglulu 69*91f16700Schasinglulu if (failed == 0) { 70*91f16700Schasinglulu NOTICE("[%d]: Success IpWrite with IP READ in buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i-3]); 71*91f16700Schasinglulu } else { 72*91f16700Schasinglulu ERROR("Write: Failed -->xxxx with IP READ in buffer[%d]=0x%08x\n", i, buffer[i]); 73*91f16700Schasinglulu return; 74*91f16700Schasinglulu } 75*91f16700Schasinglulu 76*91f16700Schasinglulu /* xspi_read may use AHB read */ 77*91f16700Schasinglulu xspi_read((fspi_test_addr), buffer, (size * 4 + extra)); 78*91f16700Schasinglulu failed = 0; 79*91f16700Schasinglulu for (i = 0; i < size; i++) 80*91f16700Schasinglulu if (fspi_swap32(0x12345678) != buffer[i]) { 81*91f16700Schasinglulu failed = 1; 82*91f16700Schasinglulu break; 83*91f16700Schasinglulu } 84*91f16700Schasinglulu 85*91f16700Schasinglulu if (failed == 0) { 86*91f16700Schasinglulu NOTICE("[%d]: Success IpWrite with AHB OR IP READ on buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i-3]); 87*91f16700Schasinglulu } else { 88*91f16700Schasinglulu ERROR("Write: Failed -->xxxx with AHB READ on buffer[%d]=0x%08x\n", i, buffer[i]); 89*91f16700Schasinglulu return; 90*91f16700Schasinglulu } 91*91f16700Schasinglulu } 92