1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright 2021 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <errno.h> 9*91f16700Schasinglulu #include <stdbool.h> 10*91f16700Schasinglulu #include <stdint.h> 11*91f16700Schasinglulu #include <stdio.h> 12*91f16700Schasinglulu #include <stdlib.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu #include <common/debug.h> 15*91f16700Schasinglulu #include <ddr.h> 16*91f16700Schasinglulu 17*91f16700Schasinglulu static void cal_ddr_sdram_clk_cntl(struct ddr_cfg_regs *regs, 18*91f16700Schasinglulu const struct memctl_opt *popts) 19*91f16700Schasinglulu { 20*91f16700Schasinglulu const unsigned int clk_adj = popts->clk_adj; 21*91f16700Schasinglulu const unsigned int ss_en = 0U; 22*91f16700Schasinglulu 23*91f16700Schasinglulu regs->clk_cntl = ((ss_en & U(0x1)) << 31U) | 24*91f16700Schasinglulu ((clk_adj & U(0x1F)) << 22U); 25*91f16700Schasinglulu debug("clk_cntl = 0x%x\n", regs->clk_cntl); 26*91f16700Schasinglulu } 27*91f16700Schasinglulu 28*91f16700Schasinglulu static void cal_ddr_cdr(struct ddr_cfg_regs *regs, 29*91f16700Schasinglulu const struct memctl_opt *popts) 30*91f16700Schasinglulu { 31*91f16700Schasinglulu regs->cdr[0] = popts->ddr_cdr1; 32*91f16700Schasinglulu regs->cdr[1] = popts->ddr_cdr2; 33*91f16700Schasinglulu debug("cdr[0] = 0x%x\n", regs->cdr[0]); 34*91f16700Schasinglulu debug("cdr[1] = 0x%x\n", regs->cdr[1]); 35*91f16700Schasinglulu } 36*91f16700Schasinglulu 37*91f16700Schasinglulu static void cal_ddr_wrlvl_cntl(struct ddr_cfg_regs *regs, 38*91f16700Schasinglulu const struct memctl_opt *popts) 39*91f16700Schasinglulu { 40*91f16700Schasinglulu const unsigned int wrlvl_en = 1U; /* enabled */ 41*91f16700Schasinglulu const unsigned int wrlvl_mrd = U(0x6); /* > 40nCK */ 42*91f16700Schasinglulu const unsigned int wrlvl_odten = U(0x7); /* 128 */ 43*91f16700Schasinglulu const unsigned int wrlvl_dqsen = U(0x5); /* > 25nCK */ 44*91f16700Schasinglulu const unsigned int wrlvl_wlr = U(0x6); /* > tWLO + 6 */ 45*91f16700Schasinglulu const unsigned int wrlvl_smpl = popts->wrlvl_override ? 46*91f16700Schasinglulu popts->wrlvl_sample : U(0xf); 47*91f16700Schasinglulu const unsigned int wrlvl_start = popts->wrlvl_start; 48*91f16700Schasinglulu 49*91f16700Schasinglulu regs->wrlvl_cntl[0] = ((wrlvl_en & U(0x1)) << 31U) | 50*91f16700Schasinglulu ((wrlvl_mrd & U(0x7)) << 24U) | 51*91f16700Schasinglulu ((wrlvl_odten & U(0x7)) << 20U) | 52*91f16700Schasinglulu ((wrlvl_dqsen & U(0x7)) << 16U) | 53*91f16700Schasinglulu ((wrlvl_smpl & U(0xf)) << 12U) | 54*91f16700Schasinglulu ((wrlvl_wlr & U(0x7)) << 8U) | 55*91f16700Schasinglulu ((wrlvl_start & U(0x1F)) << 0U); 56*91f16700Schasinglulu regs->wrlvl_cntl[1] = popts->wrlvl_ctl_2; 57*91f16700Schasinglulu regs->wrlvl_cntl[2] = popts->wrlvl_ctl_3; 58*91f16700Schasinglulu debug("wrlvl_cntl[0] = 0x%x\n", regs->wrlvl_cntl[0]); 59*91f16700Schasinglulu debug("wrlvl_cntl[1] = 0x%x\n", regs->wrlvl_cntl[1]); 60*91f16700Schasinglulu debug("wrlvl_cntl[2] = 0x%x\n", regs->wrlvl_cntl[2]); 61*91f16700Schasinglulu 62*91f16700Schasinglulu } 63*91f16700Schasinglulu 64*91f16700Schasinglulu static void cal_ddr_dbg(struct ddr_cfg_regs *regs, 65*91f16700Schasinglulu const struct memctl_opt *popts) 66*91f16700Schasinglulu { 67*91f16700Schasinglulu if (popts->cswl_override != 0) { 68*91f16700Schasinglulu regs->debug[18] = popts->cswl_override; 69*91f16700Schasinglulu } 70*91f16700Schasinglulu 71*91f16700Schasinglulu #ifdef CONFIG_SYS_FSL_DDR_EMU 72*91f16700Schasinglulu /* disable DDR training for emulator */ 73*91f16700Schasinglulu regs->debug[2] = U(0x00000400); 74*91f16700Schasinglulu regs->debug[4] = U(0xff800800); 75*91f16700Schasinglulu regs->debug[5] = U(0x08000800); 76*91f16700Schasinglulu regs->debug[6] = U(0x08000800); 77*91f16700Schasinglulu regs->debug[7] = U(0x08000800); 78*91f16700Schasinglulu regs->debug[8] = U(0x08000800); 79*91f16700Schasinglulu #endif 80*91f16700Schasinglulu if (popts->cpo_sample != 0U) { 81*91f16700Schasinglulu regs->debug[28] = popts->cpo_sample; 82*91f16700Schasinglulu debug("debug[28] = 0x%x\n", regs->debug[28]); 83*91f16700Schasinglulu } 84*91f16700Schasinglulu } 85*91f16700Schasinglulu 86*91f16700Schasinglulu int compute_ddr_phy(struct ddr_info *priv) 87*91f16700Schasinglulu { 88*91f16700Schasinglulu const struct memctl_opt *popts = &priv->opt; 89*91f16700Schasinglulu struct ddr_cfg_regs *regs = &priv->ddr_reg; 90*91f16700Schasinglulu 91*91f16700Schasinglulu cal_ddr_sdram_clk_cntl(regs, popts); 92*91f16700Schasinglulu cal_ddr_cdr(regs, popts); 93*91f16700Schasinglulu cal_ddr_wrlvl_cntl(regs, popts); 94*91f16700Schasinglulu cal_ddr_dbg(regs, popts); 95*91f16700Schasinglulu 96*91f16700Schasinglulu return 0; 97*91f16700Schasinglulu } 98