xref: /arm-trusted-firmware/drivers/nxp/ddr/nxp-ddr/ddr.mk (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu#
2*91f16700Schasinglulu# Copyright 2021-2022 NXP
3*91f16700Schasinglulu#
4*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu#
6*91f16700Schasinglulu
7*91f16700Schasingluluifeq ($(PLAT_DDR_PHY), PHY_GEN2)
8*91f16700Schasinglulu$(eval $(call add_define, PHY_GEN2))
9*91f16700SchasingluluPLAT_DDR_PHY_DIR		:= phy-gen2
10*91f16700Schasingluluifeq (${APPLY_MAX_CDD},yes)
11*91f16700Schasinglulu$(eval $(call add_define,NXP_APPLY_MAX_CDD))
12*91f16700Schasingluluendif
13*91f16700Schasinglulu
14*91f16700Schasingluluifeq (${ERRATA_DDR_A011396}, 1)
15*91f16700Schasinglulu$(eval $(call add_define,ERRATA_DDR_A011396))
16*91f16700Schasingluluendif
17*91f16700Schasinglulu
18*91f16700Schasingluluifeq (${ERRATA_DDR_A050450}, 1)
19*91f16700Schasinglulu$(eval $(call add_define,ERRATA_DDR_A050450))
20*91f16700Schasingluluendif
21*91f16700Schasinglulu
22*91f16700Schasingluluifeq (${ERRATA_DDR_A050958}, 1)
23*91f16700Schasinglulu$(eval $(call add_define,ERRATA_DDR_A050958))
24*91f16700Schasingluluendif
25*91f16700Schasinglulu
26*91f16700Schasingluluendif
27*91f16700Schasinglulu
28*91f16700Schasingluluifeq ($(PLAT_DDR_PHY), PHY_GEN1)
29*91f16700SchasingluluPLAT_DDR_PHY_DIR		:= phy-gen1
30*91f16700Schasinglulu
31*91f16700Schasingluluifeq (${ERRATA_DDR_A008511},1)
32*91f16700Schasinglulu$(eval $(call add_define,ERRATA_DDR_A008511))
33*91f16700Schasingluluendif
34*91f16700Schasinglulu
35*91f16700Schasingluluifeq (${ERRATA_DDR_A009803},1)
36*91f16700Schasinglulu$(eval $(call add_define,ERRATA_DDR_A009803))
37*91f16700Schasingluluendif
38*91f16700Schasinglulu
39*91f16700Schasingluluifeq (${ERRATA_DDR_A009942},1)
40*91f16700Schasinglulu$(eval $(call add_define,ERRATA_DDR_A009942))
41*91f16700Schasingluluendif
42*91f16700Schasinglulu
43*91f16700Schasingluluifeq (${ERRATA_DDR_A010165},1)
44*91f16700Schasinglulu$(eval $(call add_define,ERRATA_DDR_A010165))
45*91f16700Schasingluluendif
46*91f16700Schasinglulu
47*91f16700Schasingluluendif
48*91f16700Schasinglulu
49*91f16700Schasingluluifeq ($(DDR_BIST), yes)
50*91f16700Schasinglulu$(eval $(call add_define, BIST_EN))
51*91f16700Schasingluluendif
52*91f16700Schasinglulu
53*91f16700Schasingluluifeq ($(DDR_DEBUG), yes)
54*91f16700Schasinglulu$(eval $(call add_define, DDR_DEBUG))
55*91f16700Schasingluluendif
56*91f16700Schasinglulu
57*91f16700Schasingluluifeq ($(DDR_PHY_DEBUG), yes)
58*91f16700Schasinglulu$(eval $(call add_define, DDR_PHY_DEBUG))
59*91f16700Schasingluluendif
60*91f16700Schasinglulu
61*91f16700Schasingluluifeq ($(DEBUG_PHY_IO), yes)
62*91f16700Schasinglulu$(eval $(call add_define, DEBUG_PHY_IO))
63*91f16700Schasingluluendif
64*91f16700Schasinglulu
65*91f16700Schasingluluifeq ($(DEBUG_WARM_RESET), yes)
66*91f16700Schasinglulu$(eval $(call add_define, DEBUG_WARM_RESET))
67*91f16700Schasingluluendif
68*91f16700Schasinglulu
69*91f16700Schasingluluifeq ($(DEBUG_DDR_INPUT_CONFIG), yes)
70*91f16700Schasinglulu$(eval $(call add_define, DEBUG_DDR_INPUT_CONFIG))
71*91f16700Schasingluluendif
72*91f16700Schasinglulu
73*91f16700SchasingluluDDR_CNTLR_SOURCES	:= $(PLAT_DRIVERS_PATH)/ddr/nxp-ddr/ddr.c \
74*91f16700Schasinglulu			   $(PLAT_DRIVERS_PATH)/ddr/nxp-ddr/ddrc.c \
75*91f16700Schasinglulu			   $(PLAT_DRIVERS_PATH)/ddr/nxp-ddr/dimm.c \
76*91f16700Schasinglulu			   $(PLAT_DRIVERS_PATH)/ddr/nxp-ddr/regs.c \
77*91f16700Schasinglulu			   $(PLAT_DRIVERS_PATH)/ddr/nxp-ddr/utility.c \
78*91f16700Schasinglulu			   $(PLAT_DRIVERS_PATH)/ddr/$(PLAT_DDR_PHY_DIR)/phy.c
79*91f16700Schasinglulu
80*91f16700SchasingluluPLAT_INCLUDES		+= -I$(PLAT_DRIVERS_INCLUDE_PATH)/ddr
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