1*91f16700Schasinglulu /* 2*91f16700Schasinglulu * Copyright 2020 NXP 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu * 6*91f16700Schasinglulu */ 7*91f16700Schasinglulu 8*91f16700Schasinglulu #include <endian.h> 9*91f16700Schasinglulu 10*91f16700Schasinglulu #include <common/debug.h> 11*91f16700Schasinglulu #include <csu.h> 12*91f16700Schasinglulu #include <lib/mmio.h> 13*91f16700Schasinglulu 14*91f16700Schasinglulu void enable_layerscape_ns_access(struct csu_ns_dev_st *csu_ns_dev, 15*91f16700Schasinglulu uint32_t num, uintptr_t nxp_csu_addr) 16*91f16700Schasinglulu { 17*91f16700Schasinglulu uint32_t *base = (uint32_t *)nxp_csu_addr; 18*91f16700Schasinglulu uint32_t *reg; 19*91f16700Schasinglulu uint32_t val; 20*91f16700Schasinglulu int i; 21*91f16700Schasinglulu 22*91f16700Schasinglulu for (i = 0; i < num; i++) { 23*91f16700Schasinglulu reg = base + csu_ns_dev[i].ind / 2U; 24*91f16700Schasinglulu val = be32toh(mmio_read_32((uintptr_t)reg)); 25*91f16700Schasinglulu if (csu_ns_dev[i].ind % 2U == 0U) { 26*91f16700Schasinglulu val &= 0x0000ffffU; 27*91f16700Schasinglulu val |= csu_ns_dev[i].val << 16U; 28*91f16700Schasinglulu } else { 29*91f16700Schasinglulu val &= 0xffff0000U; 30*91f16700Schasinglulu val |= csu_ns_dev[i].val; 31*91f16700Schasinglulu } 32*91f16700Schasinglulu mmio_write_32((uintptr_t)reg, htobe32(val)); 33*91f16700Schasinglulu } 34*91f16700Schasinglulu } 35