xref: /arm-trusted-firmware/drivers/marvell/secure_dfx_access/dfx.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (C) 2019 Marvell International Ltd.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier:     BSD-3-Clause
5*91f16700Schasinglulu  * https://spdx.org/licenses
6*91f16700Schasinglulu  */
7*91f16700Schasinglulu 
8*91f16700Schasinglulu /* DFX sub-FID */
9*91f16700Schasinglulu #define MV_SIP_DFX_THERMAL_INIT		1
10*91f16700Schasinglulu #define MV_SIP_DFX_THERMAL_READ		2
11*91f16700Schasinglulu #define MV_SIP_DFX_THERMAL_IS_VALID	3
12*91f16700Schasinglulu #define MV_SIP_DFX_THERMAL_IRQ		4
13*91f16700Schasinglulu #define MV_SIP_DFX_THERMAL_THRESH	5
14*91f16700Schasinglulu #define MV_SIP_DFX_THERMAL_SEL_CHANNEL	6
15*91f16700Schasinglulu 
16*91f16700Schasinglulu #define MV_SIP_DFX_SREAD		20
17*91f16700Schasinglulu #define MV_SIP_DFX_SWRITE		21
18*91f16700Schasinglulu 
19*91f16700Schasinglulu int mvebu_dfx_thermal_handle(u_register_t func, u_register_t *read,
20*91f16700Schasinglulu 			     u_register_t x2, u_register_t x3);
21*91f16700Schasinglulu int mvebu_dfx_misc_handle(u_register_t func, u_register_t *read,
22*91f16700Schasinglulu 			  u_register_t addr, u_register_t val);
23