1*91f16700Schasinglulu# 2*91f16700Schasinglulu# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu# Copyright (c) 2021, NVIDIA Corporation. All rights reserved. 4*91f16700Schasinglulu# 5*91f16700Schasinglulu# SPDX-License-Identifier: BSD-3-Clause 6*91f16700Schasinglulu# 7*91f16700Schasinglulu 8*91f16700Schasinglulu# Default configuration values 9*91f16700SchasingluluGICV3_SUPPORT_GIC600 ?= 0 10*91f16700SchasingluluGICV3_SUPPORT_GIC600AE_FMU ?= 0 11*91f16700SchasingluluGICV3_IMPL_GIC600_MULTICHIP ?= 0 12*91f16700SchasingluluGICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0 13*91f16700SchasingluluGIC_ENABLE_V4_EXTN ?= 0 14*91f16700SchasingluluGIC_EXT_INTID ?= 0 15*91f16700SchasingluluGIC600_ERRATA_WA_2384374 ?= ${GICV3_SUPPORT_GIC600} 16*91f16700Schasinglulu 17*91f16700SchasingluluGICV3_SOURCES += drivers/arm/gic/v3/gicv3_main.c \ 18*91f16700Schasinglulu drivers/arm/gic/v3/gicv3_helpers.c \ 19*91f16700Schasinglulu drivers/arm/gic/v3/gicdv3_helpers.c \ 20*91f16700Schasinglulu drivers/arm/gic/v3/gicrv3_helpers.c 21*91f16700Schasinglulu 22*91f16700Schasingluluifeq (${GICV3_SUPPORT_GIC600AE_FMU}, 1) 23*91f16700SchasingluluGICV3_SOURCES += drivers/arm/gic/v3/gic600ae_fmu.c \ 24*91f16700Schasinglulu drivers/arm/gic/v3/gic600ae_fmu_helpers.c 25*91f16700Schasingluluendif 26*91f16700Schasinglulu 27*91f16700Schasingluluifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0) 28*91f16700SchasingluluGICV3_SOURCES += drivers/arm/gic/v3/arm_gicv3_common.c 29*91f16700Schasingluluendif 30*91f16700Schasinglulu 31*91f16700SchasingluluGICV3_SOURCES += drivers/arm/gic/v3/gic-x00.c 32*91f16700Schasingluluifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1) 33*91f16700SchasingluluGICV3_SOURCES += drivers/arm/gic/v3/gic600_multichip.c 34*91f16700Schasingluluendif 35*91f16700Schasinglulu 36*91f16700Schasinglulu# Set GIC-600 support 37*91f16700Schasinglulu$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600)) 38*91f16700Schasinglulu$(eval $(call add_define,GICV3_SUPPORT_GIC600)) 39*91f16700Schasinglulu 40*91f16700Schasinglulu# Set GIC-600AE FMU support 41*91f16700Schasinglulu$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600AE_FMU)) 42*91f16700Schasinglulu$(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU)) 43*91f16700Schasinglulu 44*91f16700Schasinglulu# Set GIC-600 multichip support 45*91f16700Schasinglulu$(eval $(call assert_boolean,GICV3_IMPL_GIC600_MULTICHIP)) 46*91f16700Schasinglulu$(eval $(call add_define,GICV3_IMPL_GIC600_MULTICHIP)) 47*91f16700Schasinglulu 48*91f16700Schasinglulu# Set GICv4 extension 49*91f16700Schasinglulu$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN)) 50*91f16700Schasinglulu$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 51*91f16700Schasinglulu 52*91f16700Schasinglulu# Set support for extended PPI and SPI range 53*91f16700Schasinglulu$(eval $(call assert_boolean,GIC_EXT_INTID)) 54*91f16700Schasinglulu$(eval $(call add_define,GIC_EXT_INTID)) 55*91f16700Schasinglulu 56*91f16700Schasinglulu# Set errata workaround for GIC600/GIC600AE 57*91f16700Schasinglulu$(eval $(call assert_boolean,GIC600_ERRATA_WA_2384374)) 58*91f16700Schasinglulu$(eval $(call add_define,GIC600_ERRATA_WA_2384374)) 59