xref: /arm-trusted-firmware/drivers/arm/gic/v3/gicdv3_helpers.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <stdint.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include "gicv3_private.h"
10*91f16700Schasinglulu 
11*91f16700Schasinglulu /*******************************************************************************
12*91f16700Schasinglulu  * GIC Distributor functions for accessing the GIC registers
13*91f16700Schasinglulu  * corresponding to a single interrupt ID. These functions use bitwise
14*91f16700Schasinglulu  * operations or appropriate register accesses to modify or return
15*91f16700Schasinglulu  * the bit-field corresponding the single interrupt ID.
16*91f16700Schasinglulu  ******************************************************************************/
17*91f16700Schasinglulu 
18*91f16700Schasinglulu /*
19*91f16700Schasinglulu  * Accessors to set the bits corresponding to interrupt ID
20*91f16700Schasinglulu  * in GIC Distributor ICFGR and ICFGRE.
21*91f16700Schasinglulu  */
22*91f16700Schasinglulu void gicd_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg)
23*91f16700Schasinglulu {
24*91f16700Schasinglulu 	/* Interrupt configuration is a 2-bit field */
25*91f16700Schasinglulu 	unsigned int bit_shift = BIT_NUM(ICFG, id) << 1U;
26*91f16700Schasinglulu 
27*91f16700Schasinglulu 	/* Clear the field, and insert required configuration */
28*91f16700Schasinglulu 	mmio_clrsetbits_32(base + GICD_OFFSET(ICFG, id),
29*91f16700Schasinglulu 				(uint32_t)GIC_CFG_MASK << bit_shift,
30*91f16700Schasinglulu 				(cfg & GIC_CFG_MASK) << bit_shift);
31*91f16700Schasinglulu }
32*91f16700Schasinglulu 
33*91f16700Schasinglulu /*
34*91f16700Schasinglulu  * Accessors to get/set/clear the bit corresponding to interrupt ID
35*91f16700Schasinglulu  * in GIC Distributor IGROUPR and IGROUPRE.
36*91f16700Schasinglulu  */
37*91f16700Schasinglulu unsigned int gicd_get_igroupr(uintptr_t base, unsigned int id)
38*91f16700Schasinglulu {
39*91f16700Schasinglulu 	return GICD_GET_BIT(IGROUP, base, id);
40*91f16700Schasinglulu }
41*91f16700Schasinglulu 
42*91f16700Schasinglulu void gicd_set_igroupr(uintptr_t base, unsigned int id)
43*91f16700Schasinglulu {
44*91f16700Schasinglulu 	GICD_SET_BIT(IGROUP, base, id);
45*91f16700Schasinglulu }
46*91f16700Schasinglulu 
47*91f16700Schasinglulu void gicd_clr_igroupr(uintptr_t base, unsigned int id)
48*91f16700Schasinglulu {
49*91f16700Schasinglulu 	GICD_CLR_BIT(IGROUP, base, id);
50*91f16700Schasinglulu }
51*91f16700Schasinglulu 
52*91f16700Schasinglulu /*
53*91f16700Schasinglulu  * Accessors to get/set/clear the bit corresponding to interrupt ID
54*91f16700Schasinglulu  * in GIC Distributor IGRPMODR and IGRPMODRE.
55*91f16700Schasinglulu  */
56*91f16700Schasinglulu unsigned int gicd_get_igrpmodr(uintptr_t base, unsigned int id)
57*91f16700Schasinglulu {
58*91f16700Schasinglulu 	return GICD_GET_BIT(IGRPMOD, base, id);
59*91f16700Schasinglulu }
60*91f16700Schasinglulu 
61*91f16700Schasinglulu void gicd_set_igrpmodr(uintptr_t base, unsigned int id)
62*91f16700Schasinglulu {
63*91f16700Schasinglulu 	GICD_SET_BIT(IGRPMOD, base, id);
64*91f16700Schasinglulu }
65*91f16700Schasinglulu 
66*91f16700Schasinglulu void gicd_clr_igrpmodr(uintptr_t base, unsigned int id)
67*91f16700Schasinglulu {
68*91f16700Schasinglulu 	GICD_CLR_BIT(IGRPMOD, base, id);
69*91f16700Schasinglulu }
70*91f16700Schasinglulu 
71*91f16700Schasinglulu /*
72*91f16700Schasinglulu  * Accessors to set the bit corresponding to interrupt ID
73*91f16700Schasinglulu  * in GIC Distributor ICENABLER and ICENABLERE.
74*91f16700Schasinglulu  */
75*91f16700Schasinglulu void gicd_set_icenabler(uintptr_t base, unsigned int id)
76*91f16700Schasinglulu {
77*91f16700Schasinglulu 	GICD_WRITE_BIT(ICENABLE, base, id);
78*91f16700Schasinglulu }
79*91f16700Schasinglulu 
80*91f16700Schasinglulu /*
81*91f16700Schasinglulu  * Accessors to set the bit corresponding to interrupt ID
82*91f16700Schasinglulu  * in GIC Distributor ICPENDR and ICPENDRE.
83*91f16700Schasinglulu  */
84*91f16700Schasinglulu void gicd_set_icpendr(uintptr_t base, unsigned int id)
85*91f16700Schasinglulu {
86*91f16700Schasinglulu 	GICD_WRITE_BIT(ICPEND, base, id);
87*91f16700Schasinglulu }
88*91f16700Schasinglulu 
89*91f16700Schasinglulu /*
90*91f16700Schasinglulu  * Accessors to get/set the bit corresponding to interrupt ID
91*91f16700Schasinglulu  * in GIC Distributor ISACTIVER and ISACTIVERE.
92*91f16700Schasinglulu  */
93*91f16700Schasinglulu unsigned int gicd_get_isactiver(uintptr_t base, unsigned int id)
94*91f16700Schasinglulu {
95*91f16700Schasinglulu 	return GICD_GET_BIT(ISACTIVE, base, id);
96*91f16700Schasinglulu }
97*91f16700Schasinglulu 
98*91f16700Schasinglulu void gicd_set_isactiver(uintptr_t base, unsigned int id)
99*91f16700Schasinglulu {
100*91f16700Schasinglulu 	GICD_WRITE_BIT(ISACTIVE, base, id);
101*91f16700Schasinglulu }
102*91f16700Schasinglulu 
103*91f16700Schasinglulu /*
104*91f16700Schasinglulu  * Accessors to set the bit corresponding to interrupt ID
105*91f16700Schasinglulu  * in GIC Distributor ISENABLER and ISENABLERE.
106*91f16700Schasinglulu  */
107*91f16700Schasinglulu void gicd_set_isenabler(uintptr_t base, unsigned int id)
108*91f16700Schasinglulu {
109*91f16700Schasinglulu 	GICD_WRITE_BIT(ISENABLE, base, id);
110*91f16700Schasinglulu }
111*91f16700Schasinglulu 
112*91f16700Schasinglulu /*
113*91f16700Schasinglulu  * Accessors to set the bit corresponding to interrupt ID
114*91f16700Schasinglulu  * in GIC Distributor ISPENDR and ISPENDRE.
115*91f16700Schasinglulu  */
116*91f16700Schasinglulu void gicd_set_ispendr(uintptr_t base, unsigned int id)
117*91f16700Schasinglulu {
118*91f16700Schasinglulu 	GICD_WRITE_BIT(ISPEND, base, id);
119*91f16700Schasinglulu }
120*91f16700Schasinglulu 
121*91f16700Schasinglulu /*
122*91f16700Schasinglulu  * Accessors to set the bit corresponding to interrupt ID
123*91f16700Schasinglulu  * in GIC Distributor IPRIORITYR and IPRIORITYRE.
124*91f16700Schasinglulu  */
125*91f16700Schasinglulu void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri)
126*91f16700Schasinglulu {
127*91f16700Schasinglulu 	GICD_WRITE_8(IPRIORITY, base, id, (uint8_t)(pri & GIC_PRI_MASK));
128*91f16700Schasinglulu }
129*91f16700Schasinglulu 
130*91f16700Schasinglulu /*******************************************************************************
131*91f16700Schasinglulu  * GIC Distributor interface accessors for reading/writing entire registers
132*91f16700Schasinglulu  ******************************************************************************/
133*91f16700Schasinglulu 
134*91f16700Schasinglulu /*
135*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor ICGFR and ICGFRE
136*91f16700Schasinglulu  * corresponding to the interrupt ID, 16 interrupt IDs at a time.
137*91f16700Schasinglulu  */
138*91f16700Schasinglulu unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id)
139*91f16700Schasinglulu {
140*91f16700Schasinglulu 	return GICD_READ(ICFG, base, id);
141*91f16700Schasinglulu }
142*91f16700Schasinglulu 
143*91f16700Schasinglulu void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val)
144*91f16700Schasinglulu {
145*91f16700Schasinglulu 	GICD_WRITE(ICFG, base, id, val);
146*91f16700Schasinglulu }
147*91f16700Schasinglulu 
148*91f16700Schasinglulu /*
149*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor IGROUPR and IGROUPRE
150*91f16700Schasinglulu  * corresponding to the interrupt ID, 32 interrupt IDs at a time.
151*91f16700Schasinglulu  */
152*91f16700Schasinglulu unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id)
153*91f16700Schasinglulu {
154*91f16700Schasinglulu 	return GICD_READ(IGROUP, base, id);
155*91f16700Schasinglulu }
156*91f16700Schasinglulu 
157*91f16700Schasinglulu void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val)
158*91f16700Schasinglulu {
159*91f16700Schasinglulu 	GICD_WRITE(IGROUP, base, id, val);
160*91f16700Schasinglulu }
161*91f16700Schasinglulu 
162*91f16700Schasinglulu /*
163*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor IGRPMODR and IGRPMODRE
164*91f16700Schasinglulu  * corresponding to the interrupt ID, 32 interrupt IDs at a time.
165*91f16700Schasinglulu  */
166*91f16700Schasinglulu unsigned int gicd_read_igrpmodr(uintptr_t base, unsigned int id)
167*91f16700Schasinglulu {
168*91f16700Schasinglulu 	return GICD_READ(IGRPMOD, base, id);
169*91f16700Schasinglulu }
170*91f16700Schasinglulu 
171*91f16700Schasinglulu void gicd_write_igrpmodr(uintptr_t base, unsigned int id, unsigned int val)
172*91f16700Schasinglulu {
173*91f16700Schasinglulu 	GICD_WRITE(IGRPMOD, base, id, val);
174*91f16700Schasinglulu }
175*91f16700Schasinglulu 
176*91f16700Schasinglulu /*
177*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor IPRIORITYR and IPRIORITYRE
178*91f16700Schasinglulu  * corresponding to the interrupt ID, 4 interrupt IDs at a time.
179*91f16700Schasinglulu  */
180*91f16700Schasinglulu unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id)
181*91f16700Schasinglulu {
182*91f16700Schasinglulu 	return GICD_READ(IPRIORITY, base, id);
183*91f16700Schasinglulu }
184*91f16700Schasinglulu 
185*91f16700Schasinglulu void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val)
186*91f16700Schasinglulu {
187*91f16700Schasinglulu 	GICD_WRITE(IPRIORITY, base, id, val);
188*91f16700Schasinglulu }
189*91f16700Schasinglulu 
190*91f16700Schasinglulu /*
191*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor ISACTIVER and ISACTIVERE
192*91f16700Schasinglulu  * corresponding to the interrupt ID, 32 interrupt IDs at a time.
193*91f16700Schasinglulu  */
194*91f16700Schasinglulu unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id)
195*91f16700Schasinglulu {
196*91f16700Schasinglulu 	return GICD_READ(ISACTIVE, base, id);
197*91f16700Schasinglulu }
198*91f16700Schasinglulu 
199*91f16700Schasinglulu void gicd_write_isactiver(uintptr_t base, unsigned int id, unsigned int val)
200*91f16700Schasinglulu {
201*91f16700Schasinglulu 	GICD_WRITE(ISACTIVE, base, id, val);
202*91f16700Schasinglulu }
203*91f16700Schasinglulu 
204*91f16700Schasinglulu /*
205*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor ISENABLER and ISENABLERE
206*91f16700Schasinglulu  * corresponding to the interrupt ID, 32 interrupt IDs at a time.
207*91f16700Schasinglulu  */
208*91f16700Schasinglulu unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id)
209*91f16700Schasinglulu {
210*91f16700Schasinglulu 	return GICD_READ(ISENABLE, base, id);
211*91f16700Schasinglulu }
212*91f16700Schasinglulu 
213*91f16700Schasinglulu void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val)
214*91f16700Schasinglulu {
215*91f16700Schasinglulu 	GICD_WRITE(ISENABLE, base, id, val);
216*91f16700Schasinglulu }
217*91f16700Schasinglulu 
218*91f16700Schasinglulu /*
219*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor ISPENDR and ISPENDRE
220*91f16700Schasinglulu  * corresponding to the interrupt ID, 32 interrupt IDs at a time.
221*91f16700Schasinglulu  */
222*91f16700Schasinglulu unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id)
223*91f16700Schasinglulu {
224*91f16700Schasinglulu 	return GICD_READ(ISPEND, base, id);
225*91f16700Schasinglulu }
226*91f16700Schasinglulu 
227*91f16700Schasinglulu void gicd_write_ispendr(uintptr_t base, unsigned int id, unsigned int val)
228*91f16700Schasinglulu {
229*91f16700Schasinglulu 	GICD_WRITE(ISPEND, base, id, val);
230*91f16700Schasinglulu }
231*91f16700Schasinglulu 
232*91f16700Schasinglulu /*
233*91f16700Schasinglulu  * Accessors to read/write the GIC Distributor NSACR and NSACRE
234*91f16700Schasinglulu  * corresponding to the interrupt ID, 16 interrupt IDs at a time.
235*91f16700Schasinglulu  */
236*91f16700Schasinglulu unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id)
237*91f16700Schasinglulu {
238*91f16700Schasinglulu 	return GICD_READ(NSAC, base, id);
239*91f16700Schasinglulu }
240*91f16700Schasinglulu 
241*91f16700Schasinglulu void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val)
242*91f16700Schasinglulu {
243*91f16700Schasinglulu 	GICD_WRITE(NSAC, base, id, val);
244*91f16700Schasinglulu }
245