xref: /arm-trusted-firmware/drivers/arm/ethosn/ethosn_big_fw.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2023, Arm Limited. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <stdbool.h>
8*91f16700Schasinglulu #include <stdint.h>
9*91f16700Schasinglulu 
10*91f16700Schasinglulu /*
11*91f16700Schasinglulu  * Big FW binary structure.
12*91f16700Schasinglulu  * Must be kept in sync with the Arm(R) Ethos(TM)-N NPU firmware binary layout.
13*91f16700Schasinglulu  */
14*91f16700Schasinglulu struct ethosn_big_fw {
15*91f16700Schasinglulu 	uint32_t fw_magic;
16*91f16700Schasinglulu 	uint32_t fw_ver_major;
17*91f16700Schasinglulu 	uint32_t fw_ver_minor;
18*91f16700Schasinglulu 	uint32_t fw_ver_patch;
19*91f16700Schasinglulu 	uint32_t arch_min;
20*91f16700Schasinglulu 	uint32_t arch_max;
21*91f16700Schasinglulu 	uint32_t offset;
22*91f16700Schasinglulu 	uint32_t size;
23*91f16700Schasinglulu 	uint32_t code_offset;
24*91f16700Schasinglulu 	uint32_t code_size;
25*91f16700Schasinglulu 	uint32_t ple_offset;
26*91f16700Schasinglulu 	uint32_t ple_size;
27*91f16700Schasinglulu 	uint32_t vector_table_offset;
28*91f16700Schasinglulu 	uint32_t vector_table_size;
29*91f16700Schasinglulu 	uint32_t unpriv_stack_offset;
30*91f16700Schasinglulu 	uint32_t unpriv_stack_size;
31*91f16700Schasinglulu 	uint32_t priv_stack_offset;
32*91f16700Schasinglulu 	uint32_t priv_stack_size;
33*91f16700Schasinglulu } __packed;
34*91f16700Schasinglulu 
35*91f16700Schasinglulu bool ethosn_big_fw_verify_header(const struct ethosn_big_fw *big_fw,
36*91f16700Schasinglulu 				 uint32_t npu_arch_ver);
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