xref: /arm-trusted-firmware/drivers/arm/css/scmi/vendor/scmi_sq.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #include <assert.h>
8*91f16700Schasinglulu 
9*91f16700Schasinglulu #include <arch_helpers.h>
10*91f16700Schasinglulu #include <common/debug.h>
11*91f16700Schasinglulu #include <drivers/arm/css/scmi.h>
12*91f16700Schasinglulu 
13*91f16700Schasinglulu #include "scmi_private.h"
14*91f16700Schasinglulu #include "scmi_sq.h"
15*91f16700Schasinglulu 
16*91f16700Schasinglulu #include <sq_common.h>
17*91f16700Schasinglulu 
18*91f16700Schasinglulu /* SCMI message ID to get the available DRAM region */
19*91f16700Schasinglulu #define SCMI_VENDOR_EXT_MEMINFO_GET_MSG		0x3
20*91f16700Schasinglulu 
21*91f16700Schasinglulu #define SCMI_VENDOR_EXT_MEMINFO_GET_MSG_LEN	4
22*91f16700Schasinglulu 
23*91f16700Schasinglulu /*
24*91f16700Schasinglulu  * API to get the available DRAM region
25*91f16700Schasinglulu  */
26*91f16700Schasinglulu int scmi_get_draminfo(void *p, struct draminfo *info)
27*91f16700Schasinglulu {
28*91f16700Schasinglulu 	mailbox_mem_t *mbx_mem;
29*91f16700Schasinglulu 	int token = 0, ret;
30*91f16700Schasinglulu 	scmi_channel_t *ch = (scmi_channel_t *)p;
31*91f16700Schasinglulu 	struct dram_info_resp response;
32*91f16700Schasinglulu 
33*91f16700Schasinglulu 	validate_scmi_channel(ch);
34*91f16700Schasinglulu 
35*91f16700Schasinglulu 	scmi_get_channel(ch);
36*91f16700Schasinglulu 
37*91f16700Schasinglulu 	mbx_mem = (mailbox_mem_t *)(ch->info->scmi_mbx_mem);
38*91f16700Schasinglulu 	mbx_mem->msg_header = SCMI_MSG_CREATE(SCMI_SYS_VENDOR_EXT_PROTO_ID,
39*91f16700Schasinglulu 			SCMI_VENDOR_EXT_MEMINFO_GET_MSG, token);
40*91f16700Schasinglulu 	mbx_mem->len = SCMI_VENDOR_EXT_MEMINFO_GET_MSG_LEN;
41*91f16700Schasinglulu 	mbx_mem->flags = SCMI_FLAG_RESP_POLL;
42*91f16700Schasinglulu 
43*91f16700Schasinglulu 	scmi_send_sync_command(ch);
44*91f16700Schasinglulu 
45*91f16700Schasinglulu 	/*
46*91f16700Schasinglulu 	 * Ensure that any read to the SCPI payload area is done after reading
47*91f16700Schasinglulu 	 * the MHU register. If these 2 reads were reordered then the CPU would
48*91f16700Schasinglulu 	 * read invalid payload data
49*91f16700Schasinglulu 	 */
50*91f16700Schasinglulu 	dmbld();
51*91f16700Schasinglulu 
52*91f16700Schasinglulu 	/* Get the return values */
53*91f16700Schasinglulu 	SCMI_PAYLOAD_RET_VAL1(mbx_mem->payload, ret);
54*91f16700Schasinglulu 
55*91f16700Schasinglulu 	memcpy(&response, (void *)mbx_mem->payload, sizeof(response));
56*91f16700Schasinglulu 
57*91f16700Schasinglulu 	scmi_put_channel(ch);
58*91f16700Schasinglulu 
59*91f16700Schasinglulu 	*info = response.info;
60*91f16700Schasinglulu 
61*91f16700Schasinglulu 	return ret;
62*91f16700Schasinglulu }
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