xref: /arm-trusted-firmware/drivers/arm/ccn/ccn_private.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef CCN_PRIVATE_H
8*91f16700Schasinglulu #define CCN_PRIVATE_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu /*
11*91f16700Schasinglulu  * A CCN implementation can have a maximum of 64 Request nodes with node IDs
12*91f16700Schasinglulu  * from 0-63. These IDs are split across the three types of Request nodes
13*91f16700Schasinglulu  * i.e. RN-F, RN-D and RN-I.
14*91f16700Schasinglulu  */
15*91f16700Schasinglulu #define MAX_RN_NODES		64
16*91f16700Schasinglulu 
17*91f16700Schasinglulu /* Enum used to loop through the 3 types of Request nodes */
18*91f16700Schasinglulu typedef enum rn_types {
19*91f16700Schasinglulu 	RN_TYPE_RNF = 0,
20*91f16700Schasinglulu 	RN_TYPE_RNI,
21*91f16700Schasinglulu 	RN_TYPE_RND,
22*91f16700Schasinglulu 	NUM_RN_TYPES
23*91f16700Schasinglulu } rn_types_t;
24*91f16700Schasinglulu 
25*91f16700Schasinglulu /* Macro to convert a region id to its base address */
26*91f16700Schasinglulu #define region_id_to_base(id)	((id) << 16)
27*91f16700Schasinglulu 
28*91f16700Schasinglulu /*
29*91f16700Schasinglulu  * Macro to calculate the number of master interfaces resident on a RN-I/RN-D.
30*91f16700Schasinglulu  * Value of first two bits of the RN-I/D node type + 1 == Maximum number of
31*91f16700Schasinglulu  * ACE-Lite or ACE-Lite+DVM interfaces supported on this node. E.g.
32*91f16700Schasinglulu  *
33*91f16700Schasinglulu  * 0x14 : RN-I with 1 ACE-Lite interface
34*91f16700Schasinglulu  * 0x15 : RN-I with 2 ACE-Lite interfaces
35*91f16700Schasinglulu  * 0x16 : RN-I with 3 ACE-Lite interfaces
36*91f16700Schasinglulu  */
37*91f16700Schasinglulu #define rn_type_id_to_master_cnt(id)	(((id) & 0x3) + 1)
38*91f16700Schasinglulu 
39*91f16700Schasinglulu /*
40*91f16700Schasinglulu  * Constants used to identify a region in the programmer's view. These are
41*91f16700Schasinglulu  * common for all regions.
42*91f16700Schasinglulu  */
43*91f16700Schasinglulu #define REGION_ID_LIMIT		256
44*91f16700Schasinglulu #define REGION_ID_OFFSET	0xFF00
45*91f16700Schasinglulu 
46*91f16700Schasinglulu #define REGION_NODE_ID_SHIFT	8
47*91f16700Schasinglulu #define REGION_NODE_ID_MASK	0x7f
48*91f16700Schasinglulu #define get_node_id(id_reg)	(((id_reg) >> REGION_NODE_ID_SHIFT) \
49*91f16700Schasinglulu 				 & REGION_NODE_ID_MASK)
50*91f16700Schasinglulu 
51*91f16700Schasinglulu #define REGION_NODE_TYPE_SHIFT	0
52*91f16700Schasinglulu #define REGION_NODE_TYPE_MASK	0x1f
53*91f16700Schasinglulu #define get_node_type(id_reg)	(((id_reg) >> REGION_NODE_TYPE_SHIFT) \
54*91f16700Schasinglulu 				 & REGION_NODE_TYPE_MASK)
55*91f16700Schasinglulu 
56*91f16700Schasinglulu /* Common offsets of registers to enter or exit a snoop/dvm domain */
57*91f16700Schasinglulu #define DOMAIN_CTRL_STAT_OFFSET	0x0200
58*91f16700Schasinglulu #define DOMAIN_CTRL_SET_OFFSET	0x0210
59*91f16700Schasinglulu #define DOMAIN_CTRL_CLR_OFFSET	0x0220
60*91f16700Schasinglulu 
61*91f16700Schasinglulu /*
62*91f16700Schasinglulu  * Thess macros are used to determine if an operation to add or remove a Request
63*91f16700Schasinglulu  * node from the snoop/dvm domain has completed. 'rn_id_map' is a bit map of
64*91f16700Schasinglulu  * nodes. It was used to program the SET or CLEAR control register. The type of
65*91f16700Schasinglulu  * register is specified by 'op_reg_offset'. 'status_reg' is the bit map of
66*91f16700Schasinglulu  * nodes currently present in the snoop/dvm domain. 'rn_id_map' and 'status_reg'
67*91f16700Schasinglulu  * are logically ANDed and the result it stored back in the 'status_reg'. There
68*91f16700Schasinglulu  * are two outcomes of this operation:
69*91f16700Schasinglulu  *
70*91f16700Schasinglulu  * 1. If the DOMAIN_CTRL_SET_OFFSET register was programmed, then the set bits in
71*91f16700Schasinglulu  *    'rn_id_map' should appear in 'status_reg' when the operation completes. So
72*91f16700Schasinglulu  *    after the AND operation, at some point of time 'status_reg' should equal
73*91f16700Schasinglulu  *    'rn_id_map'.
74*91f16700Schasinglulu  *
75*91f16700Schasinglulu  * 2. If the DOMAIN_CTRL_CLR_OFFSET register was programmed, then the set bits in
76*91f16700Schasinglulu  *    'rn_id_map' should disappear in 'status_reg' when the operation
77*91f16700Schasinglulu  *    completes. So after the AND operation, at some point of time 'status_reg'
78*91f16700Schasinglulu  *    should equal 0.
79*91f16700Schasinglulu  */
80*91f16700Schasinglulu #define WAIT_FOR_DOMAIN_CTRL_OP_COMPLETION(region_id, stat_reg_offset,		\
81*91f16700Schasinglulu 					   op_reg_offset, rn_id_map)		\
82*91f16700Schasinglulu 	{									\
83*91f16700Schasinglulu 		unsigned long long status_reg;						\
84*91f16700Schasinglulu 		do {								\
85*91f16700Schasinglulu 			status_reg = ccn_reg_read((ccn_plat_desc->periphbase),	\
86*91f16700Schasinglulu 						  (region_id),			\
87*91f16700Schasinglulu 						  (stat_reg_offset));		\
88*91f16700Schasinglulu 			status_reg &= (rn_id_map);				\
89*91f16700Schasinglulu 		} while ((op_reg_offset) == DOMAIN_CTRL_SET_OFFSET ?		\
90*91f16700Schasinglulu 			 (rn_id_map) != status_reg : status_reg);		\
91*91f16700Schasinglulu 	}
92*91f16700Schasinglulu 
93*91f16700Schasinglulu /*
94*91f16700Schasinglulu  * Region ID of the Miscellaneous Node is always 0 as its located at the base of
95*91f16700Schasinglulu  * the programmer's view.
96*91f16700Schasinglulu  */
97*91f16700Schasinglulu #define MN_REGION_ID		0
98*91f16700Schasinglulu 
99*91f16700Schasinglulu #define MN_REGION_ID_START	0
100*91f16700Schasinglulu #define DEBUG_REGION_ID_START	1
101*91f16700Schasinglulu #define HNI_REGION_ID_START	8
102*91f16700Schasinglulu #define SBSX_REGION_ID_START	16
103*91f16700Schasinglulu #define HNF_REGION_ID_START	32
104*91f16700Schasinglulu #define XP_REGION_ID_START	64
105*91f16700Schasinglulu #define RNI_REGION_ID_START	128
106*91f16700Schasinglulu 
107*91f16700Schasinglulu /* Selected register offsets from the base of a HNF region */
108*91f16700Schasinglulu #define HNF_CFG_CTRL_OFFSET	0x0000
109*91f16700Schasinglulu #define HNF_SAM_CTRL_OFFSET	0x0008
110*91f16700Schasinglulu #define HNF_PSTATE_REQ_OFFSET	0x0010
111*91f16700Schasinglulu #define HNF_PSTATE_STAT_OFFSET	0x0018
112*91f16700Schasinglulu #define HNF_SDC_STAT_OFFSET	DOMAIN_CTRL_STAT_OFFSET
113*91f16700Schasinglulu #define HNF_SDC_SET_OFFSET	DOMAIN_CTRL_SET_OFFSET
114*91f16700Schasinglulu #define HNF_SDC_CLR_OFFSET	DOMAIN_CTRL_CLR_OFFSET
115*91f16700Schasinglulu #define HNF_AUX_CTRL_OFFSET	0x0500
116*91f16700Schasinglulu 
117*91f16700Schasinglulu /* Selected register offsets from the base of a MN region */
118*91f16700Schasinglulu #define MN_SAR_OFFSET		0x0000
119*91f16700Schasinglulu #define MN_RNF_NODEID_OFFSET	0x0180
120*91f16700Schasinglulu #define MN_RNI_NODEID_OFFSET	0x0190
121*91f16700Schasinglulu #define MN_RND_NODEID_OFFSET	0x01A0
122*91f16700Schasinglulu #define MN_HNF_NODEID_OFFSET	0x01B0
123*91f16700Schasinglulu #define MN_HNI_NODEID_OFFSET	0x01C0
124*91f16700Schasinglulu #define MN_SN_NODEID_OFFSET	0x01D0
125*91f16700Schasinglulu #define MN_DDC_STAT_OFFSET	DOMAIN_CTRL_STAT_OFFSET
126*91f16700Schasinglulu #define MN_DDC_SET_OFFSET	DOMAIN_CTRL_SET_OFFSET
127*91f16700Schasinglulu #define MN_DDC_CLR_OFFSET	DOMAIN_CTRL_CLR_OFFSET
128*91f16700Schasinglulu #define MN_PERIPH_ID_0_1_OFFSET	0xFE0
129*91f16700Schasinglulu #define MN_ID_OFFSET		REGION_ID_OFFSET
130*91f16700Schasinglulu 
131*91f16700Schasinglulu /* HNF System Address Map register bit masks and shifts */
132*91f16700Schasinglulu #define HNF_SAM_CTRL_SN_ID_MASK		0x7f
133*91f16700Schasinglulu #define HNF_SAM_CTRL_SN0_ID_SHIFT	0
134*91f16700Schasinglulu #define HNF_SAM_CTRL_SN1_ID_SHIFT	8
135*91f16700Schasinglulu #define HNF_SAM_CTRL_SN2_ID_SHIFT	16
136*91f16700Schasinglulu 
137*91f16700Schasinglulu #define HNF_SAM_CTRL_TAB0_MASK		ULL(0x3f)
138*91f16700Schasinglulu #define HNF_SAM_CTRL_TAB0_SHIFT		48
139*91f16700Schasinglulu #define HNF_SAM_CTRL_TAB1_MASK		ULL(0x3f)
140*91f16700Schasinglulu #define HNF_SAM_CTRL_TAB1_SHIFT		56
141*91f16700Schasinglulu 
142*91f16700Schasinglulu #define HNF_SAM_CTRL_3SN_ENB_SHIFT	32
143*91f16700Schasinglulu #define HNF_SAM_CTRL_3SN_ENB_MASK	ULL(0x01)
144*91f16700Schasinglulu 
145*91f16700Schasinglulu /*
146*91f16700Schasinglulu  * Macro to create a value suitable for programming into a HNF SAM Control
147*91f16700Schasinglulu  * register for enabling 3SN striping.
148*91f16700Schasinglulu  */
149*91f16700Schasinglulu #define MAKE_HNF_SAM_CTRL_VALUE(sn0, sn1, sn2, tab0, tab1, three_sn_en)     \
150*91f16700Schasinglulu 	((((sn0) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN0_ID_SHIFT) | \
151*91f16700Schasinglulu 	 (((sn1) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN1_ID_SHIFT) | \
152*91f16700Schasinglulu 	 (((sn2) & HNF_SAM_CTRL_SN_ID_MASK) << HNF_SAM_CTRL_SN2_ID_SHIFT) | \
153*91f16700Schasinglulu 	 (((tab0) & HNF_SAM_CTRL_TAB0_MASK) << HNF_SAM_CTRL_TAB0_SHIFT)   | \
154*91f16700Schasinglulu 	 (((tab1) & HNF_SAM_CTRL_TAB1_MASK) << HNF_SAM_CTRL_TAB1_SHIFT)   | \
155*91f16700Schasinglulu 	 (((three_sn_en) & HNF_SAM_CTRL_3SN_ENB_MASK) << HNF_SAM_CTRL_3SN_ENB_SHIFT))
156*91f16700Schasinglulu 
157*91f16700Schasinglulu /* Mask to read the power state value from an HN-F P-state register */
158*91f16700Schasinglulu #define HNF_PSTATE_MASK		0xf
159*91f16700Schasinglulu 
160*91f16700Schasinglulu /* Macro to extract the run mode from a p-state value */
161*91f16700Schasinglulu #define PSTATE_TO_RUN_MODE(pstate)	(((pstate) & HNF_PSTATE_MASK) >> 2)
162*91f16700Schasinglulu 
163*91f16700Schasinglulu /*
164*91f16700Schasinglulu  * Helper macro that iterates through a given bit map. In each iteration,
165*91f16700Schasinglulu  * it returns the position of the set bit.
166*91f16700Schasinglulu  * It can be used by other utility macros to iterates through all nodes
167*91f16700Schasinglulu  * or masters given a bit map of them.
168*91f16700Schasinglulu  */
169*91f16700Schasinglulu #define FOR_EACH_BIT(bit_pos, bit_map)			\
170*91f16700Schasinglulu 	for (bit_pos = __builtin_ctzll(bit_map);	\
171*91f16700Schasinglulu 	     bit_map;					\
172*91f16700Schasinglulu 	     bit_map &= ~(1ULL << (bit_pos)),		\
173*91f16700Schasinglulu 	     bit_pos = __builtin_ctzll(bit_map))
174*91f16700Schasinglulu 
175*91f16700Schasinglulu /*
176*91f16700Schasinglulu  * Utility macro that iterates through a bit map of node IDs. In each
177*91f16700Schasinglulu  * iteration, it returns the ID of the next present node in the bit map. Node
178*91f16700Schasinglulu  * ID of a present node == Position of set bit == Number of zeroes trailing the
179*91f16700Schasinglulu  * bit.
180*91f16700Schasinglulu  */
181*91f16700Schasinglulu #define FOR_EACH_PRESENT_NODE_ID(node_id, bit_map)	\
182*91f16700Schasinglulu 		FOR_EACH_BIT(node_id, bit_map)
183*91f16700Schasinglulu 
184*91f16700Schasinglulu /*
185*91f16700Schasinglulu  * Helper function to return number of set bits in bitmap
186*91f16700Schasinglulu  */
187*91f16700Schasinglulu static inline unsigned int count_set_bits(unsigned long long bitmap)
188*91f16700Schasinglulu {
189*91f16700Schasinglulu 	unsigned int count = 0;
190*91f16700Schasinglulu 
191*91f16700Schasinglulu 	for (; bitmap; bitmap &= bitmap - 1)
192*91f16700Schasinglulu 		++count;
193*91f16700Schasinglulu 
194*91f16700Schasinglulu 	return count;
195*91f16700Schasinglulu }
196*91f16700Schasinglulu 
197*91f16700Schasinglulu /*
198*91f16700Schasinglulu  * Utility macro that iterates through a bit map of node IDs. In each iteration,
199*91f16700Schasinglulu  * it returns the ID of the next present region corresponding to a node present
200*91f16700Schasinglulu  * in the bit map. Region ID of a present node is in between passed region id
201*91f16700Schasinglulu  * and region id + number of set bits in the bitmap i.e. the number of present
202*91f16700Schasinglulu  * nodes.
203*91f16700Schasinglulu  */
204*91f16700Schasinglulu #define FOR_EACH_PRESENT_REGION_ID(region_id, bit_map)				\
205*91f16700Schasinglulu 	for (unsigned long long region_id_limit = count_set_bits(bit_map)	\
206*91f16700Schasinglulu 							+ region_id;		\
207*91f16700Schasinglulu 	    region_id < region_id_limit;					\
208*91f16700Schasinglulu 	    region_id++)
209*91f16700Schasinglulu 
210*91f16700Schasinglulu /*
211*91f16700Schasinglulu  * Same macro as FOR_EACH_PRESENT_NODE, but renamed to indicate it traverses
212*91f16700Schasinglulu  * through a bit map of master interfaces.
213*91f16700Schasinglulu  */
214*91f16700Schasinglulu #define FOR_EACH_PRESENT_MASTER_INTERFACE(iface_id, bit_map)	\
215*91f16700Schasinglulu 			FOR_EACH_BIT(iface_id, bit_map)
216*91f16700Schasinglulu 
217*91f16700Schasinglulu /*
218*91f16700Schasinglulu  * Macro that returns the node id bit map for the Miscellaneous Node
219*91f16700Schasinglulu  */
220*91f16700Schasinglulu #define CCN_GET_MN_NODEID_MAP(periphbase)				\
221*91f16700Schasinglulu 	(1 << get_node_id(ccn_reg_read(periphbase, MN_REGION_ID,	\
222*91f16700Schasinglulu 						REGION_ID_OFFSET)))
223*91f16700Schasinglulu 
224*91f16700Schasinglulu /*
225*91f16700Schasinglulu  * This macro returns the bitmap of Home nodes on the basis of the
226*91f16700Schasinglulu  * 'mn_hn_id_reg_offset' parameter from the Miscellaneous node's (MN)
227*91f16700Schasinglulu  * programmer's view. The MN has a register which carries the bitmap of present
228*91f16700Schasinglulu  * Home nodes of each type i.e. HN-Fs, HN-Is & HN-Ds.
229*91f16700Schasinglulu  */
230*91f16700Schasinglulu #define CCN_GET_HN_NODEID_MAP(periphbase, mn_hn_id_reg_offset)		\
231*91f16700Schasinglulu 	ccn_reg_read(periphbase, MN_REGION_ID, mn_hn_id_reg_offset)
232*91f16700Schasinglulu 
233*91f16700Schasinglulu #endif /* CCN_PRIVATE_H */
234