1*91f16700Schasinglulu/* 2*91f16700Schasinglulu * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 3*91f16700Schasinglulu * 4*91f16700Schasinglulu * SPDX-License-Identifier: BSD-3-Clause 5*91f16700Schasinglulu */ 6*91f16700Schasinglulu 7*91f16700Schasinglulu#include <asm_macros.S> 8*91f16700Schasinglulu#include <assert_macros.S> 9*91f16700Schasinglulu#include <console_macros.S> 10*91f16700Schasinglulu#include <drivers/amlogic/meson_console.h> 11*91f16700Schasinglulu 12*91f16700Schasinglulu .globl console_meson_register 13*91f16700Schasinglulu .globl console_meson_init 14*91f16700Schasinglulu .globl console_meson_putc 15*91f16700Schasinglulu .globl console_meson_getc 16*91f16700Schasinglulu .globl console_meson_flush 17*91f16700Schasinglulu .globl console_meson_core_putc 18*91f16700Schasinglulu .globl console_meson_core_getc 19*91f16700Schasinglulu .globl console_meson_core_flush 20*91f16700Schasinglulu 21*91f16700Schasinglulu /* ----------------------------------------------- 22*91f16700Schasinglulu * Hardware definitions 23*91f16700Schasinglulu * ----------------------------------------------- 24*91f16700Schasinglulu */ 25*91f16700Schasinglulu#define MESON_WFIFO_OFFSET 0x0 26*91f16700Schasinglulu#define MESON_RFIFO_OFFSET 0x4 27*91f16700Schasinglulu#define MESON_CONTROL_OFFSET 0x8 28*91f16700Schasinglulu#define MESON_STATUS_OFFSET 0xC 29*91f16700Schasinglulu#define MESON_MISC_OFFSET 0x10 30*91f16700Schasinglulu#define MESON_REG5_OFFSET 0x14 31*91f16700Schasinglulu 32*91f16700Schasinglulu#define MESON_CONTROL_CLR_ERROR_BIT 24 33*91f16700Schasinglulu#define MESON_CONTROL_RX_RESET_BIT 23 34*91f16700Schasinglulu#define MESON_CONTROL_TX_RESET_BIT 22 35*91f16700Schasinglulu#define MESON_CONTROL_RX_ENABLE_BIT 13 36*91f16700Schasinglulu#define MESON_CONTROL_TX_ENABLE_BIT 12 37*91f16700Schasinglulu 38*91f16700Schasinglulu#define MESON_STATUS_RX_EMPTY_BIT 20 39*91f16700Schasinglulu#define MESON_STATUS_TX_FULL_BIT 21 40*91f16700Schasinglulu#define MESON_STATUS_TX_EMPTY_BIT 22 41*91f16700Schasinglulu 42*91f16700Schasinglulu#define MESON_REG5_USE_XTAL_CLK_BIT 24 43*91f16700Schasinglulu#define MESON_REG5_USE_NEW_RATE_BIT 23 44*91f16700Schasinglulu#define MESON_REG5_NEW_BAUD_RATE_MASK 0x7FFFFF 45*91f16700Schasinglulu 46*91f16700Schasinglulu /* ----------------------------------------------- 47*91f16700Schasinglulu * int console_meson_register(uintptr_t base, 48*91f16700Schasinglulu * uint32_t clk, uint32_t baud, 49*91f16700Schasinglulu * console_t *console); 50*91f16700Schasinglulu * Function to initialize and register a new MESON 51*91f16700Schasinglulu * console. Storage passed in for the console struct 52*91f16700Schasinglulu * *must* be persistent (i.e. not from the stack). 53*91f16700Schasinglulu * In: x0 - UART register base address 54*91f16700Schasinglulu * w1 - UART clock in Hz 55*91f16700Schasinglulu * w2 - Baud rate 56*91f16700Schasinglulu * x3 - pointer to empty console_t struct 57*91f16700Schasinglulu * Out: return 1 on success, 0 on error 58*91f16700Schasinglulu * Clobber list : x0, x1, x2, x6, x7, x14 59*91f16700Schasinglulu * ----------------------------------------------- 60*91f16700Schasinglulu */ 61*91f16700Schasinglulufunc console_meson_register 62*91f16700Schasinglulu mov x7, x30 63*91f16700Schasinglulu mov x6, x3 64*91f16700Schasinglulu cbz x6, register_fail 65*91f16700Schasinglulu str x0, [x6, #CONSOLE_T_BASE] 66*91f16700Schasinglulu 67*91f16700Schasinglulu bl console_meson_init 68*91f16700Schasinglulu cbz x0, register_fail 69*91f16700Schasinglulu 70*91f16700Schasinglulu mov x0, x6 71*91f16700Schasinglulu mov x30, x7 72*91f16700Schasinglulu finish_console_register meson putc=1, getc=ENABLE_CONSOLE_GETC, flush=1 73*91f16700Schasinglulu 74*91f16700Schasingluluregister_fail: 75*91f16700Schasinglulu ret x7 76*91f16700Schasingluluendfunc console_meson_register 77*91f16700Schasinglulu 78*91f16700Schasinglulu /* ----------------------------------------------- 79*91f16700Schasinglulu * int console_meson_init(uintptr_t base_addr, 80*91f16700Schasinglulu * unsigned int uart_clk, unsigned int baud_rate) 81*91f16700Schasinglulu * Function to initialize the console without a 82*91f16700Schasinglulu * C Runtime to print debug information. This 83*91f16700Schasinglulu * function will be accessed by console_init and 84*91f16700Schasinglulu * crash reporting. 85*91f16700Schasinglulu * In: x0 - console base address 86*91f16700Schasinglulu * w1 - Uart clock in Hz 87*91f16700Schasinglulu * w2 - Baud rate 88*91f16700Schasinglulu * Out: return 1 on success else 0 on error 89*91f16700Schasinglulu * Clobber list : x0-x3 90*91f16700Schasinglulu * ----------------------------------------------- 91*91f16700Schasinglulu */ 92*91f16700Schasinglulufunc console_meson_init 93*91f16700Schasinglulu cmp w0, #0 94*91f16700Schasinglulu beq init_fail 95*91f16700Schasinglulu mov_imm w3, 24000000 /* TODO: This only works with a 24 MHz clock. */ 96*91f16700Schasinglulu cmp w1, w3 97*91f16700Schasinglulu bne init_fail 98*91f16700Schasinglulu cmp w2, #0 99*91f16700Schasinglulu beq init_fail 100*91f16700Schasinglulu /* Set baud rate: value = ((clock / 3) / baudrate) - 1 */ 101*91f16700Schasinglulu mov w3, #3 102*91f16700Schasinglulu udiv w3, w1, w3 103*91f16700Schasinglulu udiv w3, w3, w2 104*91f16700Schasinglulu sub w3, w3, #1 105*91f16700Schasinglulu orr w3, w3, #((1 << MESON_REG5_USE_XTAL_CLK_BIT) | \ 106*91f16700Schasinglulu (1 << MESON_REG5_USE_NEW_RATE_BIT)) 107*91f16700Schasinglulu str w3, [x0, #MESON_REG5_OFFSET] 108*91f16700Schasinglulu /* Reset UART and clear error flag */ 109*91f16700Schasinglulu ldr w3, [x0, #MESON_CONTROL_OFFSET] 110*91f16700Schasinglulu orr w3, w3, #((1 << MESON_CONTROL_CLR_ERROR_BIT) | \ 111*91f16700Schasinglulu (1 << MESON_CONTROL_RX_RESET_BIT) | \ 112*91f16700Schasinglulu (1 << MESON_CONTROL_TX_RESET_BIT)) 113*91f16700Schasinglulu str w3, [x0, #MESON_CONTROL_OFFSET] 114*91f16700Schasinglulu bic w3, w3, #((1 << MESON_CONTROL_CLR_ERROR_BIT) | \ 115*91f16700Schasinglulu (1 << MESON_CONTROL_RX_RESET_BIT) | \ 116*91f16700Schasinglulu (1 << MESON_CONTROL_TX_RESET_BIT)) 117*91f16700Schasinglulu str w3, [x0, #MESON_CONTROL_OFFSET] 118*91f16700Schasinglulu /* Enable transfer and receive FIFO */ 119*91f16700Schasinglulu orr w3, w3, #((1 << MESON_CONTROL_RX_ENABLE_BIT) | \ 120*91f16700Schasinglulu (1 << MESON_CONTROL_TX_ENABLE_BIT)) 121*91f16700Schasinglulu str w3, [x0, #MESON_CONTROL_OFFSET] 122*91f16700Schasinglulu /* Success */ 123*91f16700Schasinglulu mov w0, #1 124*91f16700Schasinglulu ret 125*91f16700Schasingluluinit_fail: 126*91f16700Schasinglulu mov w0, wzr 127*91f16700Schasinglulu ret 128*91f16700Schasingluluendfunc console_meson_init 129*91f16700Schasinglulu 130*91f16700Schasinglulu /* -------------------------------------------------------- 131*91f16700Schasinglulu * int console_meson_putc(int c, console_t *console) 132*91f16700Schasinglulu * Function to output a character over the console. It 133*91f16700Schasinglulu * returns the character printed on success or -1 on error. 134*91f16700Schasinglulu * In : w0 - character to be printed 135*91f16700Schasinglulu * x1 - pointer to console_t structure 136*91f16700Schasinglulu * Out : return -1 on error else return character. 137*91f16700Schasinglulu * Clobber list : x2 138*91f16700Schasinglulu * -------------------------------------------------------- 139*91f16700Schasinglulu */ 140*91f16700Schasinglulufunc console_meson_putc 141*91f16700Schasinglulu#if ENABLE_ASSERTIONS 142*91f16700Schasinglulu cmp x1, #0 143*91f16700Schasinglulu ASM_ASSERT(ne) 144*91f16700Schasinglulu#endif /* ENABLE_ASSERTIONS */ 145*91f16700Schasinglulu ldr x1, [x1, #CONSOLE_T_BASE] 146*91f16700Schasinglulu b console_meson_core_putc 147*91f16700Schasingluluendfunc console_meson_putc 148*91f16700Schasinglulu 149*91f16700Schasinglulu /* -------------------------------------------------------- 150*91f16700Schasinglulu * int console_meson_core_putc(int c, uintptr_t base_addr) 151*91f16700Schasinglulu * Function to output a character over the console. It 152*91f16700Schasinglulu * returns the character printed on success or -1 on error. 153*91f16700Schasinglulu * In : w0 - character to be printed 154*91f16700Schasinglulu * x1 - console base address 155*91f16700Schasinglulu * Out : return -1 on error else return character. 156*91f16700Schasinglulu * Clobber list : x2 157*91f16700Schasinglulu * -------------------------------------------------------- 158*91f16700Schasinglulu */ 159*91f16700Schasinglulufunc console_meson_core_putc 160*91f16700Schasinglulu#if ENABLE_ASSERTIONS 161*91f16700Schasinglulu cmp x1, #0 162*91f16700Schasinglulu ASM_ASSERT(ne) 163*91f16700Schasinglulu#endif 164*91f16700Schasinglulu /* Prepend '\r' to '\n' */ 165*91f16700Schasinglulu cmp w0, #0xA 166*91f16700Schasinglulu b.ne 2f 167*91f16700Schasinglulu /* Wait until the transmit FIFO isn't full */ 168*91f16700Schasinglulu1: ldr w2, [x1, #MESON_STATUS_OFFSET] 169*91f16700Schasinglulu tbnz w2, #MESON_STATUS_TX_FULL_BIT, 1b 170*91f16700Schasinglulu /* Write '\r' if needed */ 171*91f16700Schasinglulu mov w2, #0xD 172*91f16700Schasinglulu str w2, [x1, #MESON_WFIFO_OFFSET] 173*91f16700Schasinglulu /* Wait until the transmit FIFO isn't full */ 174*91f16700Schasinglulu2: ldr w2, [x1, #MESON_STATUS_OFFSET] 175*91f16700Schasinglulu tbnz w2, #MESON_STATUS_TX_FULL_BIT, 2b 176*91f16700Schasinglulu /* Write input character */ 177*91f16700Schasinglulu str w0, [x1, #MESON_WFIFO_OFFSET] 178*91f16700Schasinglulu ret 179*91f16700Schasingluluendfunc console_meson_core_putc 180*91f16700Schasinglulu 181*91f16700Schasinglulu /* --------------------------------------------- 182*91f16700Schasinglulu * int console_meson_getc(console_t *console) 183*91f16700Schasinglulu * Function to get a character from the console. 184*91f16700Schasinglulu * It returns the character grabbed on success 185*91f16700Schasinglulu * or -1 if no character is available. 186*91f16700Schasinglulu * In : x0 - pointer to console_t structure 187*91f16700Schasinglulu * Out: w0 - character if available, else -1 188*91f16700Schasinglulu * Clobber list : x0, x1 189*91f16700Schasinglulu * --------------------------------------------- 190*91f16700Schasinglulu */ 191*91f16700Schasinglulufunc console_meson_getc 192*91f16700Schasinglulu#if ENABLE_ASSERTIONS 193*91f16700Schasinglulu cmp x0, #0 194*91f16700Schasinglulu ASM_ASSERT(ne) 195*91f16700Schasinglulu#endif /* ENABLE_ASSERTIONS */ 196*91f16700Schasinglulu ldr x0, [x0, #CONSOLE_T_BASE] 197*91f16700Schasinglulu b console_meson_core_getc 198*91f16700Schasingluluendfunc console_meson_getc 199*91f16700Schasinglulu 200*91f16700Schasinglulu /* --------------------------------------------- 201*91f16700Schasinglulu * int console_meson_core_getc(uintptr_t base_addr) 202*91f16700Schasinglulu * Function to get a character from the console. 203*91f16700Schasinglulu * It returns the character grabbed on success 204*91f16700Schasinglulu * or -1 if no character is available. 205*91f16700Schasinglulu * In : x0 - console base address 206*91f16700Schasinglulu * Out: w0 - character if available, else -1 207*91f16700Schasinglulu * Clobber list : x0, x1 208*91f16700Schasinglulu * --------------------------------------------- 209*91f16700Schasinglulu */ 210*91f16700Schasinglulufunc console_meson_core_getc 211*91f16700Schasinglulu#if ENABLE_ASSERTIONS 212*91f16700Schasinglulu cmp x0, #0 213*91f16700Schasinglulu ASM_ASSERT(ne) 214*91f16700Schasinglulu#endif 215*91f16700Schasinglulu /* Is the receive FIFO empty? */ 216*91f16700Schasinglulu ldr w1, [x0, #MESON_STATUS_OFFSET] 217*91f16700Schasinglulu tbnz w1, #MESON_STATUS_RX_EMPTY_BIT, 1f 218*91f16700Schasinglulu /* Read one character from the RX FIFO */ 219*91f16700Schasinglulu ldr w0, [x0, #MESON_RFIFO_OFFSET] 220*91f16700Schasinglulu ret 221*91f16700Schasinglulu1: 222*91f16700Schasinglulu mov w0, #ERROR_NO_PENDING_CHAR 223*91f16700Schasinglulu ret 224*91f16700Schasingluluendfunc console_meson_core_getc 225*91f16700Schasinglulu 226*91f16700Schasinglulu /* --------------------------------------------- 227*91f16700Schasinglulu * void console_meson_flush(console_t *console) 228*91f16700Schasinglulu * Function to force a write of all buffered 229*91f16700Schasinglulu * data that hasn't been output. 230*91f16700Schasinglulu * In : x0 - pointer to console_t structure 231*91f16700Schasinglulu * Out : void. 232*91f16700Schasinglulu * Clobber list : x0, x1 233*91f16700Schasinglulu * --------------------------------------------- 234*91f16700Schasinglulu */ 235*91f16700Schasinglulufunc console_meson_flush 236*91f16700Schasinglulu#if ENABLE_ASSERTIONS 237*91f16700Schasinglulu cmp x0, #0 238*91f16700Schasinglulu ASM_ASSERT(ne) 239*91f16700Schasinglulu#endif /* ENABLE_ASSERTIONS */ 240*91f16700Schasinglulu ldr x0, [x0, #CONSOLE_T_BASE] 241*91f16700Schasinglulu b console_meson_core_flush 242*91f16700Schasingluluendfunc console_meson_flush 243*91f16700Schasinglulu 244*91f16700Schasinglulu /* --------------------------------------------- 245*91f16700Schasinglulu * void console_meson_core_flush(uintptr_t base_addr) 246*91f16700Schasinglulu * Function to force a write of all buffered 247*91f16700Schasinglulu * data that hasn't been output. 248*91f16700Schasinglulu * In : x0 - console base address 249*91f16700Schasinglulu * Out : void. 250*91f16700Schasinglulu * Clobber list : x0, x1 251*91f16700Schasinglulu * --------------------------------------------- 252*91f16700Schasinglulu */ 253*91f16700Schasinglulufunc console_meson_core_flush 254*91f16700Schasinglulu#if ENABLE_ASSERTIONS 255*91f16700Schasinglulu cmp x0, #0 256*91f16700Schasinglulu ASM_ASSERT(ne) 257*91f16700Schasinglulu#endif 258*91f16700Schasinglulu /* Wait until the transmit FIFO is empty */ 259*91f16700Schasinglulu1: ldr w1, [x0, #MESON_STATUS_OFFSET] 260*91f16700Schasinglulu tbz w1, #MESON_STATUS_TX_EMPTY_BIT, 1b 261*91f16700Schasinglulu ret 262*91f16700Schasingluluendfunc console_meson_core_flush 263