1*91f16700SchasingluluMarvell IOB address decoding bindings 2*91f16700Schasinglulu===================================== 3*91f16700Schasinglulu 4*91f16700SchasingluluIO bridge configuration driver (3rd stage address translation) for Marvell Armada 8K and 8K+ SoCs. 5*91f16700Schasinglulu 6*91f16700SchasingluluThe IOB includes a description of the address decoding configuration. 7*91f16700Schasinglulu 8*91f16700SchasingluluIOB supports up to n (in CP110 n=24) windows for external memory transaction. 9*91f16700SchasingluluWhen a transaction passes through the IOB, its address is compared to each of 10*91f16700Schasingluluthe enabled windows. If there is a hit and it passes the security checks, it is 11*91f16700Schasingluluadvanced to the target port. 12*91f16700Schasinglulu 13*91f16700SchasingluluMandatory functions 14*91f16700Schasinglulu------------------- 15*91f16700Schasinglulu 16*91f16700Schasinglulu- marvell_get_iob_memory_map 17*91f16700Schasinglulu Returns the IOB windows configuration and the number of windows 18*91f16700Schasinglulu 19*91f16700SchasingluluMandatory structures 20*91f16700Schasinglulu-------------------- 21*91f16700Schasinglulu 22*91f16700Schasinglulu- iob_memory_map 23*91f16700Schasinglulu Array that includes the configuration of the windows. Every window/entry is 24*91f16700Schasinglulu a struct which has 3 parameters: 25*91f16700Schasinglulu 26*91f16700Schasinglulu - Base address of the window 27*91f16700Schasinglulu - Size of the window 28*91f16700Schasinglulu - Target-ID of the window 29*91f16700Schasinglulu 30*91f16700SchasingluluTarget ID options 31*91f16700Schasinglulu----------------- 32*91f16700Schasinglulu 33*91f16700Schasinglulu- **0x0** = Internal configuration space 34*91f16700Schasinglulu- **0x1** = MCI0 35*91f16700Schasinglulu- **0x2** = PEX1_X1 36*91f16700Schasinglulu- **0x3** = PEX2_X1 37*91f16700Schasinglulu- **0x4** = PEX0_X4 38*91f16700Schasinglulu- **0x5** = NAND flash 39*91f16700Schasinglulu- **0x6** = RUNIT (NOR/SPI/BootRoom) 40*91f16700Schasinglulu- **0x7** = MCI1 41*91f16700Schasinglulu 42*91f16700SchasingluluExample 43*91f16700Schasinglulu------- 44*91f16700Schasinglulu 45*91f16700Schasinglulu.. code:: c 46*91f16700Schasinglulu 47*91f16700Schasinglulu struct addr_map_win iob_memory_map[] = { 48*91f16700Schasinglulu {0x00000000f7000000, 0x0000000001000000, PEX1_TID}, /* PEX1_X1 window */ 49*91f16700Schasinglulu {0x00000000f8000000, 0x0000000001000000, PEX2_TID}, /* PEX2_X1 window */ 50*91f16700Schasinglulu {0x00000000f6000000, 0x0000000001000000, PEX0_TID}, /* PEX0_X4 window */ 51*91f16700Schasinglulu {0x00000000f9000000, 0x0000000001000000, NAND_TID} /* NAND window */ 52*91f16700Schasinglulu }; 53