1*91f16700SchasingluluMarvell CCU address decoding bindings 2*91f16700Schasinglulu===================================== 3*91f16700Schasinglulu 4*91f16700SchasingluluCCU configuration driver (1st stage address translation) for Marvell Armada 8K and 8K+ SoCs. 5*91f16700Schasinglulu 6*91f16700SchasingluluThe CCU node includes a description of the address decoding configuration. 7*91f16700Schasinglulu 8*91f16700SchasingluluMandatory functions 9*91f16700Schasinglulu------------------- 10*91f16700Schasinglulu 11*91f16700Schasinglulu- marvell_get_ccu_memory_map 12*91f16700Schasinglulu Return the CCU windows configuration and the number of windows of the 13*91f16700Schasinglulu specific AP. 14*91f16700Schasinglulu 15*91f16700SchasingluluMandatory structures 16*91f16700Schasinglulu-------------------- 17*91f16700Schasinglulu 18*91f16700Schasinglulu- ccu_memory_map 19*91f16700Schasinglulu Array that includes the configuration of the windows. Every window/entry is 20*91f16700Schasinglulu a struct which has 3 parameters: 21*91f16700Schasinglulu 22*91f16700Schasinglulu - Base address of the window 23*91f16700Schasinglulu - Size of the window 24*91f16700Schasinglulu - Target-ID of the window 25*91f16700Schasinglulu 26*91f16700SchasingluluExample 27*91f16700Schasinglulu------- 28*91f16700Schasinglulu 29*91f16700Schasinglulu.. code:: c 30*91f16700Schasinglulu 31*91f16700Schasinglulu struct addr_map_win ccu_memory_map[] = { 32*91f16700Schasinglulu {0x00000000f2000000, 0x00000000e000000, IO_0_TID}, /* IO window */ 33*91f16700Schasinglulu }; 34