xref: /arm-trusted-firmware/docs/plat/intel-agilex.rst (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700SchasingluluIntel Agilex SoCFPGA
2*91f16700Schasinglulu========================
3*91f16700Schasinglulu
4*91f16700SchasingluluAgilex SoCFPGA is a FPGA with integrated quad-core 64-bit Arm Cortex A53 processor.
5*91f16700Schasinglulu
6*91f16700SchasingluluUpon boot, Boot ROM loads bl2 into OCRAM. Bl2 subsequently initializes
7*91f16700Schasingluluthe hardware, then loads bl31 and bl33 (UEFI) into DDR and boots to bl33.
8*91f16700Schasinglulu
9*91f16700Schasinglulu::
10*91f16700Schasinglulu
11*91f16700Schasinglulu    Boot ROM --> Trusted Firmware-A --> UEFI
12*91f16700Schasinglulu
13*91f16700SchasingluluHow to build
14*91f16700Schasinglulu------------
15*91f16700Schasinglulu
16*91f16700SchasingluluCode Locations
17*91f16700Schasinglulu~~~~~~~~~~~~~~
18*91f16700Schasinglulu
19*91f16700Schasinglulu-  Trusted Firmware-A:
20*91f16700Schasinglulu   `link <https://github.com/ARM-software/arm-trusted-firmware>`__
21*91f16700Schasinglulu
22*91f16700Schasinglulu-  UEFI (to be updated with new upstreamed UEFI):
23*91f16700Schasinglulu   `link <https://github.com/altera-opensource/uefi-socfpga>`__
24*91f16700Schasinglulu
25*91f16700SchasingluluBuild Procedure
26*91f16700Schasinglulu~~~~~~~~~~~~~~~
27*91f16700Schasinglulu
28*91f16700Schasinglulu-  Fetch all the above 2 repositories into local host.
29*91f16700Schasinglulu   Make all the repositories in the same ${BUILD\_PATH}.
30*91f16700Schasinglulu
31*91f16700Schasinglulu-  Prepare the AARCH64 toolchain.
32*91f16700Schasinglulu
33*91f16700Schasinglulu-  Build UEFI using Agilex platform as configuration
34*91f16700Schasinglulu   This will be updated to use an updated UEFI using the latest EDK2 source
35*91f16700Schasinglulu
36*91f16700Schasinglulu.. code:: bash
37*91f16700Schasinglulu
38*91f16700Schasinglulu       make CROSS_COMPILE=aarch64-linux-gnu- device=agx
39*91f16700Schasinglulu
40*91f16700Schasinglulu-  Build atf providing the previously generated UEFI as the BL33 image
41*91f16700Schasinglulu
42*91f16700Schasinglulu.. code:: bash
43*91f16700Schasinglulu
44*91f16700Schasinglulu       make CROSS_COMPILE=aarch64-linux-gnu- bl2 fip PLAT=agilex
45*91f16700Schasinglulu       BL33=PEI.ROM
46*91f16700Schasinglulu
47*91f16700SchasingluluInstall Procedure
48*91f16700Schasinglulu~~~~~~~~~~~~~~~~~
49*91f16700Schasinglulu
50*91f16700Schasinglulu- dd fip.bin to a A2 partition on the MMC drive to be booted in Agilex
51*91f16700Schasinglulu  board.
52*91f16700Schasinglulu
53*91f16700Schasinglulu- Generate a SOF containing bl2
54*91f16700Schasinglulu
55*91f16700Schasinglulu.. code:: bash
56*91f16700Schasinglulu
57*91f16700Schasinglulu        aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 bl2.bin bl2.hex
58*91f16700Schasinglulu        quartus_cpf --bootloader bl2.hex <quartus_generated_sof> <output_sof_with_bl2>
59*91f16700Schasinglulu
60*91f16700Schasinglulu- Configure SOF to board
61*91f16700Schasinglulu
62*91f16700Schasinglulu.. code:: bash
63*91f16700Schasinglulu
64*91f16700Schasinglulu        nios2-configure-sof <output_sof_with_bl2>
65*91f16700Schasinglulu
66*91f16700SchasingluluBoot trace
67*91f16700Schasinglulu----------
68*91f16700Schasinglulu
69*91f16700Schasinglulu::
70*91f16700Schasinglulu
71*91f16700Schasinglulu        INFO:    DDR: DRAM calibration success.
72*91f16700Schasinglulu        INFO:    ECC is disabled.
73*91f16700Schasinglulu        NOTICE:  BL2: v2.1(debug)
74*91f16700Schasinglulu        NOTICE:  BL2: Built
75*91f16700Schasinglulu        INFO:    BL2: Doing platform setup
76*91f16700Schasinglulu        NOTICE:  BL2: Booting BL31
77*91f16700Schasinglulu        INFO:    Entry point address = 0xffe1c000
78*91f16700Schasinglulu        INFO:    SPSR = 0x3cd
79*91f16700Schasinglulu        NOTICE:  BL31: v2.1(debug)
80*91f16700Schasinglulu        NOTICE:  BL31: Built
81*91f16700Schasinglulu        INFO:    ARM GICv2 driver initialized
82*91f16700Schasinglulu        INFO:    BL31: Initializing runtime services
83*91f16700Schasinglulu        WARNING: BL31: cortex_a53
84*91f16700Schasinglulu        INFO:    BL31: Preparing for EL3 exit to normal world
85*91f16700Schasinglulu        INFO:    Entry point address = 0x50000
86*91f16700Schasinglulu        INFO:    SPSR = 0x3c9
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