xref: /arm-trusted-firmware/docs/plat/arm/corstone1000/index.rst (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700SchasingluluCorstone1000 Platform
2*91f16700Schasinglulu==========================
3*91f16700Schasinglulu
4*91f16700SchasingluluSome of the features of the Corstone1000 platform referenced in TF-A include:
5*91f16700Schasinglulu
6*91f16700Schasinglulu- Cortex-A35 application processor (64-bit mode)
7*91f16700Schasinglulu- Secure Enclave
8*91f16700Schasinglulu- GIC-400
9*91f16700Schasinglulu- Trusted Board Boot
10*91f16700Schasinglulu
11*91f16700SchasingluluBoot Sequence
12*91f16700Schasinglulu-------------
13*91f16700Schasinglulu
14*91f16700SchasingluluThe board boot relies on CoT (chain of trust). The trusted-firmware-a
15*91f16700SchasingluluBL2 is extracted from the FIP and verified by the Secure Enclave
16*91f16700Schasingluluprocessor. BL2 verification relies on the signature area at the
17*91f16700Schasinglulubeginning of the BL2 image. This area is needed by the SecureEnclave
18*91f16700Schasinglulubootloader.
19*91f16700Schasinglulu
20*91f16700SchasingluluThen, the application processor is released from reset and starts by
21*91f16700Schasingluluexecuting BL2.
22*91f16700Schasinglulu
23*91f16700SchasingluluBL2 performs the actions described in the trusted-firmware-a TBB design
24*91f16700Schasingluludocument.
25*91f16700Schasinglulu
26*91f16700SchasingluluBuild Procedure (TF-A only)
27*91f16700Schasinglulu~~~~~~~~~~~~~~~~~~~~~~~~~~~
28*91f16700Schasinglulu
29*91f16700Schasinglulu-  Obtain AArch64 ELF bare-metal target `toolchain <https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads>`_.
30*91f16700Schasinglulu   Set the CROSS_COMPILE environment variable to point to the toolchain folder.
31*91f16700Schasinglulu
32*91f16700Schasinglulu-  Build TF-A:
33*91f16700Schasinglulu
34*91f16700Schasinglulu   .. code:: shell
35*91f16700Schasinglulu
36*91f16700Schasinglulu      make LD=aarch64-none-elf-ld \
37*91f16700Schasinglulu      CC=aarch64-none-elf-gcc \
38*91f16700Schasinglulu      V=1 \
39*91f16700Schasinglulu      BUILD_BASE=<path to the build folder> \
40*91f16700Schasinglulu      PLAT=corstone1000 \
41*91f16700Schasinglulu      SPD=spmd \
42*91f16700Schasinglulu      SPMD_SPM_AT_SEL2=0 \
43*91f16700Schasinglulu      DEBUG=1 \
44*91f16700Schasinglulu      MBEDTLS_DIR=mbedtls \
45*91f16700Schasinglulu      OPENSSL_DIR=<path to openssl usr folder> \
46*91f16700Schasinglulu      RUNTIME_SYSROOT=<path to the sysroot> \
47*91f16700Schasinglulu      ARCH=aarch64 \
48*91f16700Schasinglulu      TARGET_PLATFORM=<fpga or fvp> \
49*91f16700Schasinglulu      ENABLE_PIE=1 \
50*91f16700Schasinglulu      RESET_TO_BL2=1 \
51*91f16700Schasinglulu      CREATE_KEYS=1 \
52*91f16700Schasinglulu      GENERATE_COT=1 \
53*91f16700Schasinglulu      TRUSTED_BOARD_BOOT=1 \
54*91f16700Schasinglulu      COT=tbbr \
55*91f16700Schasinglulu      ARM_ROTPK_LOCATION=devel_rsa \
56*91f16700Schasinglulu      ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \
57*91f16700Schasinglulu      BL32=<path to optee binary> \
58*91f16700Schasinglulu      BL33=<path to u-boot binary> \
59*91f16700Schasinglulu      bl2
60*91f16700Schasinglulu
61*91f16700Schasinglulu*Copyright (c) 2021-2023, Arm Limited. All rights reserved.*
62