1*91f16700SchasingluluRuntime Instrumentation Methodology 2*91f16700Schasinglulu=================================== 3*91f16700Schasinglulu 4*91f16700SchasingluluThis document outlines steps for undertaking performance measurements of key 5*91f16700Schasingluluoperations in the Trusted Firmware-A Power State Coordination Interface (PSCI) 6*91f16700Schasingluluimplementation, using the in-built Performance Measurement Framework (PMF) and 7*91f16700Schasingluluruntime instrumentation timestamps. 8*91f16700Schasinglulu 9*91f16700SchasingluluFramework 10*91f16700Schasinglulu~~~~~~~~~ 11*91f16700Schasinglulu 12*91f16700SchasingluluThe tests are based on the ``runtime-instrumentation`` test suite provided by 13*91f16700Schasingluluthe Trusted Firmware Test Framework (TFTF). The release build of this framework 14*91f16700Schasingluluwas used because the results in the debug build became skewed; the console 15*91f16700Schasingluluoutput prevented some of the tests from executing in parallel. 16*91f16700Schasinglulu 17*91f16700SchasingluluThe tests consist of both parallel and sequential tests, which are broadly 18*91f16700Schasingluludescribed as follows: 19*91f16700Schasinglulu 20*91f16700Schasinglulu- **Parallel Tests** This type of test powers on all the non-lead CPUs and 21*91f16700Schasinglulu brings them and the lead CPU to a common synchronization point. The lead CPU 22*91f16700Schasinglulu then initiates the test on all CPUs in parallel. 23*91f16700Schasinglulu 24*91f16700Schasinglulu- **Sequential Tests** This type of test powers on each non-lead CPU in 25*91f16700Schasinglulu sequence. The lead CPU initiates the test on a non-lead CPU then waits for the 26*91f16700Schasinglulu test to complete before proceeding to the next non-lead CPU. The lead CPU then 27*91f16700Schasinglulu executes the test on itself. 28*91f16700Schasinglulu 29*91f16700SchasingluluNote there is very little variance observed in the values given (~1us), although 30*91f16700Schasingluluthe values for each CPU are sometimes interchanged, depending on the order in 31*91f16700Schasingluluwhich locks are acquired. Also, there is very little variance observed between 32*91f16700Schasingluluexecuting the tests sequentially in a single boot or rebooting between tests. 33*91f16700Schasinglulu 34*91f16700SchasingluluGiven that runtime instrumentation using PMF is invasive, there is a small 35*91f16700Schasinglulu(unquantified) overhead on the results. PMF uses the generic counter for 36*91f16700Schasinglulutimestamps, which runs at 50MHz on Juno. 37*91f16700Schasinglulu 38*91f16700SchasingluluMetrics 39*91f16700Schasinglulu~~~~~~~ 40*91f16700Schasinglulu 41*91f16700Schasinglulu.. glossary:: 42*91f16700Schasinglulu 43*91f16700Schasinglulu Powerdown Latency 44*91f16700Schasinglulu Time taken from entering the TF PSCI implementation to the point the hardware 45*91f16700Schasinglulu enters the low power state (WFI). Referring to the TF runtime instrumentation points, this 46*91f16700Schasinglulu corresponds to: ``(RT_INSTR_ENTER_HW_LOW_PWR - RT_INSTR_ENTER_PSCI)``. 47*91f16700Schasinglulu 48*91f16700Schasinglulu Wakeup Latency 49*91f16700Schasinglulu Time taken from the point the hardware exits the low power state to exiting 50*91f16700Schasinglulu the TF PSCI implementation. This corresponds to: ``(RT_INSTR_EXIT_PSCI - 51*91f16700Schasinglulu RT_INSTR_EXIT_HW_LOW_PWR)``. 52*91f16700Schasinglulu 53*91f16700Schasinglulu Cache Flush Latency 54*91f16700Schasinglulu Time taken to flush the caches during powerdown. This corresponds to: 55*91f16700Schasinglulu ``(RT_INSTR_EXIT_CFLUSH - RT_INSTR_ENTER_CFLUSH)``. 56