1*91f16700SchasingluluAlternative Boot Flows 2*91f16700Schasinglulu====================== 3*91f16700Schasinglulu 4*91f16700SchasingluluEL3 payloads alternative boot flow 5*91f16700Schasinglulu---------------------------------- 6*91f16700Schasinglulu 7*91f16700SchasingluluOn a pre-production system, the ability to execute arbitrary, bare-metal code at 8*91f16700Schasingluluthe highest exception level is required. It allows full, direct access to the 9*91f16700Schasingluluhardware, for example to run silicon soak tests. 10*91f16700Schasinglulu 11*91f16700SchasingluluAlthough it is possible to implement some baremetal secure firmware from 12*91f16700Schasingluluscratch, this is a complex task on some platforms, depending on the level of 13*91f16700Schasingluluconfiguration required to put the system in the expected state. 14*91f16700Schasinglulu 15*91f16700SchasingluluRather than booting a baremetal application, a possible compromise is to boot 16*91f16700Schasinglulu``EL3 payloads`` through TF-A instead. This is implemented as an alternative 17*91f16700Schasingluluboot flow, where a modified BL2 boots an EL3 payload, instead of loading the 18*91f16700Schasingluluother BL images and passing control to BL31. It reduces the complexity of 19*91f16700Schasingluludeveloping EL3 baremetal code by: 20*91f16700Schasinglulu 21*91f16700Schasinglulu- putting the system into a known architectural state; 22*91f16700Schasinglulu- taking care of platform secure world initialization; 23*91f16700Schasinglulu- loading the SCP_BL2 image if required by the platform. 24*91f16700Schasinglulu 25*91f16700SchasingluluWhen booting an EL3 payload on Arm standard platforms, the configuration of the 26*91f16700SchasingluluTrustZone controller is simplified such that only region 0 is enabled and is 27*91f16700Schasingluluconfigured to permit secure access only. This gives full access to the whole 28*91f16700SchasingluluDRAM to the EL3 payload. 29*91f16700Schasinglulu 30*91f16700SchasingluluThe system is left in the same state as when entering BL31 in the default boot 31*91f16700Schasingluluflow. In particular: 32*91f16700Schasinglulu 33*91f16700Schasinglulu- Running in EL3; 34*91f16700Schasinglulu- Current state is AArch64; 35*91f16700Schasinglulu- Little-endian data access; 36*91f16700Schasinglulu- All exceptions disabled; 37*91f16700Schasinglulu- MMU disabled; 38*91f16700Schasinglulu- Caches disabled. 39*91f16700Schasinglulu 40*91f16700Schasinglulu.. _alt_boot_flows_el3_payload: 41*91f16700Schasinglulu 42*91f16700SchasingluluBooting an EL3 payload 43*91f16700Schasinglulu~~~~~~~~~~~~~~~~~~~~~~ 44*91f16700Schasinglulu 45*91f16700SchasingluluThe EL3 payload image is a standalone image and is not part of the FIP. It is 46*91f16700Schasinglulunot loaded by TF-A. Therefore, there are 2 possible scenarios: 47*91f16700Schasinglulu 48*91f16700Schasinglulu- The EL3 payload may reside in non-volatile memory (NVM) and execute in 49*91f16700Schasinglulu place. In this case, booting it is just a matter of specifying the right 50*91f16700Schasinglulu address in NVM through ``EL3_PAYLOAD_BASE`` when building TF-A. 51*91f16700Schasinglulu 52*91f16700Schasinglulu- The EL3 payload needs to be loaded in volatile memory (e.g. DRAM) at 53*91f16700Schasinglulu run-time. 54*91f16700Schasinglulu 55*91f16700SchasingluluTo help in the latter scenario, the ``SPIN_ON_BL1_EXIT=1`` build option can be 56*91f16700Schasingluluused. The infinite loop that it introduces in BL1 stops execution at the right 57*91f16700Schasinglulumoment for a debugger to take control of the target and load the payload (for 58*91f16700Schasingluluexample, over JTAG). 59*91f16700Schasinglulu 60*91f16700SchasingluluIt is expected that this loading method will work in most cases, as a debugger 61*91f16700Schasingluluconnection is usually available in a pre-production system. The user is free to 62*91f16700Schasingluluuse any other platform-specific mechanism to load the EL3 payload, though. 63*91f16700Schasinglulu 64*91f16700Schasinglulu 65*91f16700SchasingluluPreloaded BL33 alternative boot flow 66*91f16700Schasinglulu------------------------------------ 67*91f16700Schasinglulu 68*91f16700SchasingluluSome platforms have the ability to preload BL33 into memory instead of relying 69*91f16700Schasingluluon TF-A to load it. This may simplify packaging of the normal world code and 70*91f16700Schasingluluimprove performance in a development environment. When secure world cold boot 71*91f16700Schasingluluis complete, TF-A simply jumps to a BL33 base address provided at build time. 72*91f16700Schasinglulu 73*91f16700SchasingluluFor this option to be used, the ``PRELOADED_BL33_BASE`` build option has to be 74*91f16700Schasingluluused when compiling TF-A. For example, the following command will create a FIP 75*91f16700Schasingluluwithout a BL33 and prepare to jump to a BL33 image loaded at address 76*91f16700Schasinglulu0x80000000: 77*91f16700Schasinglulu 78*91f16700Schasinglulu.. code:: shell 79*91f16700Schasinglulu 80*91f16700Schasinglulu make PRELOADED_BL33_BASE=0x80000000 PLAT=fvp all fip 81*91f16700Schasinglulu 82*91f16700Schasinglulu-------------- 83*91f16700Schasinglulu 84*91f16700Schasinglulu*Copyright (c) 2019, Arm Limited. All rights reserved.* 85