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1*91f16700SchasingluluTranslation (XLAT) Tables Library
2*91f16700Schasinglulu=================================
3*91f16700Schasinglulu
4*91f16700SchasingluluThis document describes the design of the translation tables library (version 2)
5*91f16700Schasingluluused by Trusted Firmware-A (TF-A). This library provides APIs to create page
6*91f16700Schasinglulutables based on a description of the memory layout, as well as setting up system
7*91f16700Schasingluluregisters related to the Memory Management Unit (MMU) and performing the
8*91f16700Schasinglulurequired Translation Lookaside Buffer (TLB) maintenance operations.
9*91f16700Schasinglulu
10*91f16700SchasingluluMore specifically, some use cases that this library aims to support are:
11*91f16700Schasinglulu
12*91f16700Schasinglulu#. Statically allocate translation tables and populate them (at run-time) based
13*91f16700Schasinglulu   upon a description of the memory layout. The memory layout is typically
14*91f16700Schasinglulu   provided by the platform port as a list of memory regions;
15*91f16700Schasinglulu
16*91f16700Schasinglulu#. Support for generating translation tables pertaining to a different
17*91f16700Schasinglulu   translation regime than the exception level the library code is executing at;
18*91f16700Schasinglulu
19*91f16700Schasinglulu#. Support for dynamic mapping and unmapping of regions, even while the MMU is
20*91f16700Schasinglulu   on. This can be used to temporarily map some memory regions and unmap them
21*91f16700Schasinglulu   later on when no longer needed;
22*91f16700Schasinglulu
23*91f16700Schasinglulu#. Support for non-identity virtual to physical mappings to compress the virtual
24*91f16700Schasinglulu   address space;
25*91f16700Schasinglulu
26*91f16700Schasinglulu#. Support for changing memory attributes of memory regions at run-time.
27*91f16700Schasinglulu
28*91f16700Schasinglulu
29*91f16700SchasingluluAbout version 1, version 2 and MPU libraries
30*91f16700Schasinglulu--------------------------------------------
31*91f16700Schasinglulu
32*91f16700SchasingluluThis document focuses on version 2 of the library, whose sources are available
33*91f16700Schasingluluin the ``lib/xlat_tables_v2`` directory. Version 1 of the library can still be
34*91f16700Schasinglulufound in ``lib/xlat_tables`` directory but it is less flexible and doesn't
35*91f16700Schasinglulusupport dynamic mapping. ``lib/xlat_mpu``, which configures Arm's MPU
36*91f16700Schasingluluequivalently, is also addressed here. The ``lib/xlat_mpu`` is experimental,
37*91f16700Schasinglulumeaning that its API may change. It currently strives for consistency and
38*91f16700Schasinglulucode-reuse with xlat_tables_v2.  Future versions may be more MPU-specific (e.g.,
39*91f16700Schasingluluremoving all mentions of virtual addresses). Although potential bug fixes will
40*91f16700Schasinglulube applied to all versions of the xlat_* libs, future feature enhancements will
41*91f16700Schasinglulufocus on version 2 and might not be back-ported to version 1 and MPU versions.
42*91f16700SchasingluluTherefore, it is recommended to use version 2, especially for new platform
43*91f16700Schasingluluports (unless the platform uses an MPU).
44*91f16700Schasinglulu
45*91f16700SchasingluluHowever, please note that version 2 and the MPU version are still in active
46*91f16700Schasingluludevelopment and is not considered stable yet. Hence, compatibility breaks might
47*91f16700Schasinglulube introduced.
48*91f16700Schasinglulu
49*91f16700SchasingluluFrom this point onwards, this document will implicitly refer to version 2 of the
50*91f16700Schasinglululibrary, unless stated otherwise.
51*91f16700Schasinglulu
52*91f16700Schasinglulu
53*91f16700SchasingluluDesign concepts and interfaces
54*91f16700Schasinglulu------------------------------
55*91f16700Schasinglulu
56*91f16700SchasingluluThis section presents some of the key concepts and data structures used in the
57*91f16700Schasinglulutranslation tables library.
58*91f16700Schasinglulu
59*91f16700Schasinglulu`mmap` regions
60*91f16700Schasinglulu~~~~~~~~~~~~~~
61*91f16700Schasinglulu
62*91f16700SchasingluluAn ``mmap_region`` is an abstract, concise way to represent a memory region to
63*91f16700Schasinglulumap. It is one of the key interfaces to the library. It is identified by:
64*91f16700Schasinglulu
65*91f16700Schasinglulu- its physical base address;
66*91f16700Schasinglulu- its virtual base address;
67*91f16700Schasinglulu- its size;
68*91f16700Schasinglulu- its attributes;
69*91f16700Schasinglulu- its mapping granularity (optional).
70*91f16700Schasinglulu
71*91f16700SchasingluluSee the ``struct mmap_region`` type in ``xlat_tables_v2.h``.
72*91f16700Schasinglulu
73*91f16700SchasingluluThe user usually provides a list of such mmap regions to map and lets the
74*91f16700Schasinglululibrary transpose that in a set of translation tables. As a result, the library
75*91f16700Schasinglulumight create new translation tables, update or split existing ones.
76*91f16700Schasinglulu
77*91f16700SchasingluluThe region attributes specify the type of memory (for example device or cached
78*91f16700Schasinglulunormal memory) as well as the memory access permissions (read-only or
79*91f16700Schasingluluread-write, executable or not, secure or non-secure, and so on). In the case of
80*91f16700Schasingluluthe EL1&0 translation regime, the attributes also specify whether the region is
81*91f16700Schasinglulua User region (EL0) or Privileged region (EL1). See the ``MT_xxx`` definitions
82*91f16700Schasingluluin ``xlat_tables_v2.h``. Note that for the EL1&0 translation regime the Execute
83*91f16700SchasingluluNever attribute is set simultaneously for both EL1 and EL0.
84*91f16700Schasinglulu
85*91f16700SchasingluluThe granularity controls the translation table level to go down to when mapping
86*91f16700Schasingluluthe region. For example, assuming the MMU has been configured to use a 4KB
87*91f16700Schasinglulugranule size, the library might map a 2MB memory region using either of the two
88*91f16700Schasinglulufollowing options:
89*91f16700Schasinglulu
90*91f16700Schasinglulu- using a single level-2 translation table entry;
91*91f16700Schasinglulu- using a level-2 intermediate entry to a level-3 translation table (which
92*91f16700Schasinglulu  contains 512 entries, each mapping 4KB).
93*91f16700Schasinglulu
94*91f16700SchasingluluThe first solution potentially requires less translation tables, hence
95*91f16700Schasinglulupotentially less memory.  However, if part of this 2MB region is later remapped
96*91f16700Schasingluluwith different memory attributes, the library might need to split the existing
97*91f16700Schasinglulupage tables to refine the mappings. If a single level-2 entry has been used
98*91f16700Schasingluluhere, a level-3 table will need to be allocated on the fly and the level-2
99*91f16700Schasinglulumodified to point to this new level-3 table. This has a performance cost at
100*91f16700Schasinglulurun-time.
101*91f16700Schasinglulu
102*91f16700SchasingluluIf the user knows upfront that such a remapping operation is likely to happen
103*91f16700Schasingluluthen they might enforce a 4KB mapping granularity for this 2MB region from the
104*91f16700Schasinglulubeginning; remapping some of these 4KB pages on the fly then becomes a
105*91f16700Schasinglululightweight operation.
106*91f16700Schasinglulu
107*91f16700SchasingluluThe region's granularity is an optional field; if it is not specified the
108*91f16700Schasinglululibrary will choose the mapping granularity for this region as it sees fit (more
109*91f16700Schasingluludetails can be found in `The memory mapping algorithm`_ section below).
110*91f16700Schasinglulu
111*91f16700SchasingluluThe MPU library also uses ``struct mmap_region`` to specify translations, but
112*91f16700Schasingluluthe MPU's translations are limited to specification of valid addresses and
113*91f16700Schasingluluaccess permissions.  If the requested virtual and physical addresses mismatch
114*91f16700Schasingluluthe system will panic. Being register-based for deterministic memory-reference
115*91f16700Schasinglulutiming, the MPU hardware does not involve memory-resident translation tables.
116*91f16700Schasinglulu
117*91f16700SchasingluluCurrently, the MPU library is also limited to MPU translation at EL2 with no
118*91f16700SchasingluluMMU translation at other ELs.  These limitations, however, are expected to be
119*91f16700Schasingluluovercome in future library versions.
120*91f16700Schasinglulu
121*91f16700SchasingluluTranslation Context
122*91f16700Schasinglulu~~~~~~~~~~~~~~~~~~~
123*91f16700Schasinglulu
124*91f16700SchasingluluThe library can create or modify translation tables pertaining to a different
125*91f16700Schasinglulutranslation regime than the exception level the library code is executing at.
126*91f16700SchasingluluFor example, the library might be used by EL3 software (for instance BL31) to
127*91f16700Schasinglulucreate translation tables pertaining to the S-EL1&0 translation regime.
128*91f16700Schasinglulu
129*91f16700SchasingluluThis flexibility comes from the use of *translation contexts*. A *translation
130*91f16700Schasinglulucontext* constitutes the superset of information used by the library to track
131*91f16700Schasingluluthe status of a set of translation tables for a given translation regime.
132*91f16700Schasinglulu
133*91f16700SchasingluluThe library internally allocates a default translation context, which pertains
134*91f16700Schasingluluto the translation regime of the current exception level. Additional contexts
135*91f16700Schasinglulumay be explicitly allocated and initialized using the
136*91f16700Schasinglulu``REGISTER_XLAT_CONTEXT()`` macro. Separate APIs are provided to act either on
137*91f16700Schasingluluthe default translation context or on an alternative one.
138*91f16700Schasinglulu
139*91f16700SchasingluluTo register a translation context, the user must provide the library with the
140*91f16700Schasinglulufollowing information:
141*91f16700Schasinglulu
142*91f16700Schasinglulu* A name.
143*91f16700Schasinglulu
144*91f16700Schasinglulu  The resulting translation context variable will be called after this name, to
145*91f16700Schasinglulu  which ``_xlat_ctx`` is appended. For example, if the macro name parameter is
146*91f16700Schasinglulu  ``foo``, the context variable name will be ``foo_xlat_ctx``.
147*91f16700Schasinglulu
148*91f16700Schasinglulu* The maximum number of `mmap` regions to map.
149*91f16700Schasinglulu
150*91f16700Schasinglulu  Should account for both static and dynamic regions, if applicable.
151*91f16700Schasinglulu
152*91f16700Schasinglulu* The number of sub-translation tables to allocate.
153*91f16700Schasinglulu
154*91f16700Schasinglulu  Number of translation tables to statically allocate for this context,
155*91f16700Schasinglulu  excluding the initial lookup level translation table, which is always
156*91f16700Schasinglulu  allocated. For example, if the initial lookup level is 1, this parameter would
157*91f16700Schasinglulu  specify the number of level-2 and level-3 translation tables to pre-allocate
158*91f16700Schasinglulu  for this context.
159*91f16700Schasinglulu
160*91f16700Schasinglulu* The size of the virtual address space.
161*91f16700Schasinglulu
162*91f16700Schasinglulu  Size in bytes of the virtual address space to map using this context. This
163*91f16700Schasinglulu  will incidentally determine the number of entries in the initial lookup level
164*91f16700Schasinglulu  translation table : the library will allocate as many entries as is required
165*91f16700Schasinglulu  to map the entire virtual address space.
166*91f16700Schasinglulu
167*91f16700Schasinglulu* The size of the physical address space.
168*91f16700Schasinglulu
169*91f16700Schasinglulu  Size in bytes of the physical address space to map using this context.
170*91f16700Schasinglulu
171*91f16700SchasingluluThe default translation context is internally initialized using information
172*91f16700Schasinglulucoming (for the most part) from platform-specific defines:
173*91f16700Schasinglulu
174*91f16700Schasinglulu- name: hard-coded to ``tf`` ; hence the name of the default context variable is
175*91f16700Schasinglulu  ``tf_xlat_ctx``;
176*91f16700Schasinglulu- number of `mmap` regions: ``MAX_MMAP_REGIONS``;
177*91f16700Schasinglulu- number of sub-translation tables: ``MAX_XLAT_TABLES``;
178*91f16700Schasinglulu- size of the virtual address space: ``PLAT_VIRT_ADDR_SPACE_SIZE``;
179*91f16700Schasinglulu- size of the physical address space: ``PLAT_PHY_ADDR_SPACE_SIZE``.
180*91f16700Schasinglulu
181*91f16700SchasingluluPlease refer to the :ref:`Porting Guide` for more details about these macros.
182*91f16700Schasinglulu
183*91f16700Schasinglulu
184*91f16700SchasingluluStatic and dynamic memory regions
185*91f16700Schasinglulu~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
186*91f16700Schasinglulu
187*91f16700SchasingluluThe library optionally supports dynamic memory mapping. This feature may be
188*91f16700Schasingluluenabled using the ``PLAT_XLAT_TABLES_DYNAMIC`` platform build flag.
189*91f16700Schasinglulu
190*91f16700SchasingluluWhen dynamic memory mapping is enabled, the library categorises mmap regions as
191*91f16700Schasinglulu*static* or *dynamic*.
192*91f16700Schasinglulu
193*91f16700Schasinglulu- *Static regions* are fixed for the lifetime of the system. They can only be
194*91f16700Schasinglulu  added early on, before the translation tables are created and populated. They
195*91f16700Schasinglulu  cannot be removed afterwards.
196*91f16700Schasinglulu
197*91f16700Schasinglulu- *Dynamic regions* can be added or removed any time.
198*91f16700Schasinglulu
199*91f16700SchasingluluWhen the dynamic memory mapping feature is disabled, only static regions exist.
200*91f16700Schasinglulu
201*91f16700SchasingluluThe dynamic memory mapping feature may be used to map and unmap transient memory
202*91f16700Schasingluluareas. This is useful when the user needs to access some memory for a fixed
203*91f16700Schasingluluperiod of time, after which the memory may be discarded and reclaimed. For
204*91f16700Schasingluluexample, a memory region that is only required at boot time while the system is
205*91f16700Schasingluluinitializing, or to temporarily share a memory buffer between the normal world
206*91f16700Schasingluluand trusted world. Note that it is up to the caller to ensure that these regions
207*91f16700Schasingluluare not accessed concurrently while the regions are being added or removed.
208*91f16700Schasinglulu
209*91f16700SchasingluluAlthough this feature provides some level of dynamic memory allocation, this
210*91f16700Schasingluludoes not allow dynamically allocating an arbitrary amount of memory at an
211*91f16700Schasingluluarbitrary memory location. The user is still required to declare at compile-time
212*91f16700Schasingluluthe limits of these allocations ; the library will deny any mapping request that
213*91f16700Schasingluludoes not fit within this pre-allocated pool of memory.
214*91f16700Schasinglulu
215*91f16700Schasinglulu
216*91f16700SchasingluluLibrary APIs
217*91f16700Schasinglulu------------
218*91f16700Schasinglulu
219*91f16700SchasingluluThe external APIs exposed by this library are declared and documented in the
220*91f16700Schasinglulu``xlat_tables_v2.h`` header file. This should be the reference point for
221*91f16700Schasinglulugetting information about the usage of the different APIs this library
222*91f16700Schasingluluprovides. This section just provides some extra details and clarifications.
223*91f16700Schasinglulu
224*91f16700SchasingluluAlthough the ``mmap_region`` structure is a publicly visible type, it is not
225*91f16700Schasinglulurecommended to populate these structures by hand. Instead, wherever APIs expect
226*91f16700Schasinglulufunction arguments of type ``mmap_region_t``, these should be constructed using
227*91f16700Schasingluluthe ``MAP_REGION*()`` family of helper macros. This is to limit the risk of
228*91f16700Schasinglulucompatibility breaks, should the ``mmap_region`` structure type evolve in the
229*91f16700Schasinglulufuture.
230*91f16700Schasinglulu
231*91f16700SchasingluluThe ``MAP_REGION()`` and ``MAP_REGION_FLAT()`` macros do not allow specifying a
232*91f16700Schasinglulumapping granularity, which leaves the library implementation free to choose
233*91f16700Schasingluluit. However, in cases where a specific granularity is required, the
234*91f16700Schasinglulu``MAP_REGION2()`` macro might be used instead. Using ``MAP_REGION_FLAT()`` only
235*91f16700Schasingluluto define regions for the MPU library is strongly recommended.
236*91f16700Schasinglulu
237*91f16700SchasingluluAs explained earlier in this document, when the dynamic mapping feature is
238*91f16700Schasingluludisabled, there is no notion of dynamic regions. Conceptually, there are only
239*91f16700Schasinglulustatic regions. For this reason (and to retain backward compatibility with the
240*91f16700Schasingluluversion 1 of the library), the APIs that map static regions do not embed the
241*91f16700Schasingluluword *static* in their functions names (for example ``mmap_add_region()``), in
242*91f16700Schasinglulucontrast with the dynamic regions APIs (for example
243*91f16700Schasinglulu``mmap_add_dynamic_region()``).
244*91f16700Schasinglulu
245*91f16700SchasingluluAlthough the definition of static and dynamic regions is not based on the state
246*91f16700Schasingluluof the MMU, the two are still related in some way. Static regions can only be
247*91f16700Schasingluluadded before ``init_xlat_tables()`` is called and ``init_xlat_tables()`` must be
248*91f16700Schasinglulucalled while the MMU is still off. As a result, static regions cannot be added
249*91f16700Schasingluluonce the MMU has been enabled. Dynamic regions can be added with the MMU on or
250*91f16700Schasingluluoff. In practice, the usual call flow would look like this:
251*91f16700Schasinglulu
252*91f16700Schasinglulu#. The MMU is initially off.
253*91f16700Schasinglulu
254*91f16700Schasinglulu#. Add some static regions, add some dynamic regions.
255*91f16700Schasinglulu
256*91f16700Schasinglulu#. Initialize translation tables based on the list of mmap regions (using one of
257*91f16700Schasinglulu   the ``init_xlat_tables*()`` APIs).
258*91f16700Schasinglulu
259*91f16700Schasinglulu#. At this point, it is no longer possible to add static regions. Dynamic
260*91f16700Schasinglulu   regions can still be added or removed.
261*91f16700Schasinglulu
262*91f16700Schasinglulu#. Enable the MMU.
263*91f16700Schasinglulu
264*91f16700Schasinglulu#. Dynamic regions can continue to be added or removed.
265*91f16700Schasinglulu
266*91f16700SchasingluluBecause static regions are added early on at boot time and are all in the
267*91f16700Schasinglulucontrol of the platform initialization code, the ``mmap_add*()`` family of APIs
268*91f16700Schasingluluare not expected to fail. They do not return any error code.
269*91f16700Schasinglulu
270*91f16700SchasingluluNonetheless, these APIs will check upfront whether the region can be
271*91f16700Schasinglulusuccessfully added before updating the translation context structure. If the
272*91f16700Schasinglululibrary detects that there is insufficient memory to meet the request, or that
273*91f16700Schasingluluthe new region will overlap another one in an invalid way, or if any other
274*91f16700Schasingluluunexpected error is encountered, they will print an error message on the UART.
275*91f16700SchasingluluAdditionally, when asserts are enabled (typically in debug builds), an assertion
276*91f16700Schasingluluwill be triggered. Otherwise, the function call will just return straight away,
277*91f16700Schasingluluwithout adding the offending memory region.
278*91f16700Schasinglulu
279*91f16700Schasinglulu
280*91f16700SchasingluluLibrary limitations
281*91f16700Schasinglulu-------------------
282*91f16700Schasinglulu
283*91f16700SchasingluluDynamic regions are not allowed to overlap each other. Static regions are
284*91f16700Schasingluluallowed to overlap as long as one of them is fully contained inside the other
285*91f16700Schasingluluone. This is allowed for backwards compatibility with the previous behaviour in
286*91f16700Schasingluluthe version 1 of the library.
287*91f16700Schasinglulu
288*91f16700Schasinglulu
289*91f16700SchasingluluImplementation details
290*91f16700Schasinglulu----------------------
291*91f16700Schasinglulu
292*91f16700SchasingluluCode structure
293*91f16700Schasinglulu~~~~~~~~~~~~~~
294*91f16700Schasinglulu
295*91f16700SchasingluluThe library is divided into 4 modules:
296*91f16700Schasinglulu
297*91f16700Schasinglulu- **Core module**
298*91f16700Schasinglulu
299*91f16700Schasinglulu  Provides the main functionality of the library, such as the initialization of
300*91f16700Schasinglulu  translation tables contexts and mapping/unmapping memory regions. This module
301*91f16700Schasinglulu  provides functions such as ``mmap_add_region_ctx`` that let the caller specify
302*91f16700Schasinglulu  the translation tables context affected by them.
303*91f16700Schasinglulu
304*91f16700Schasinglulu  See ``xlat_tables_core.c``.
305*91f16700Schasinglulu
306*91f16700Schasinglulu- **Active context module**
307*91f16700Schasinglulu
308*91f16700Schasinglulu  Instantiates the context that is used by the current BL image and provides
309*91f16700Schasinglulu  helpers to manipulate it, abstracting it from the rest of the code.
310*91f16700Schasinglulu  This module provides functions such as ``mmap_add_region``, that directly
311*91f16700Schasinglulu  affect the BL image using them.
312*91f16700Schasinglulu
313*91f16700Schasinglulu  See ``xlat_tables_context.c``.
314*91f16700Schasinglulu
315*91f16700Schasinglulu- **Utilities module**
316*91f16700Schasinglulu
317*91f16700Schasinglulu  Provides additional functionality like debug print of the current state of the
318*91f16700Schasinglulu  translation tables and helpers to query memory attributes and to modify them.
319*91f16700Schasinglulu
320*91f16700Schasinglulu  See ``xlat_tables_utils.c``.
321*91f16700Schasinglulu
322*91f16700Schasinglulu- **Architectural module**
323*91f16700Schasinglulu
324*91f16700Schasinglulu  Provides functions that are dependent on the current execution state
325*91f16700Schasinglulu  (AArch32/AArch64), such as the functions used for TLB invalidation, setup the
326*91f16700Schasinglulu  MMU, or calculate the Physical Address Space size. They do not need a
327*91f16700Schasinglulu  translation context to work on.
328*91f16700Schasinglulu
329*91f16700Schasinglulu  See ``aarch32/xlat_tables_arch.c`` and ``aarch64/xlat_tables_arch.c``.
330*91f16700Schasinglulu
331*91f16700SchasingluluFrom mmap regions to translation tables
332*91f16700Schasinglulu~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
333*91f16700Schasinglulu
334*91f16700SchasingluluA translation context contains a list of ``mmap_region_t``, which holds the
335*91f16700Schasingluluinformation of all the regions that are mapped at any given time. Whenever there
336*91f16700Schasingluluis a request to map (resp. unmap) a memory region, it is added to (resp. removed
337*91f16700Schasinglulufrom) the ``mmap_region_t`` list.
338*91f16700Schasinglulu
339*91f16700SchasingluluThe mmap regions list is a conceptual way to represent the memory layout. At
340*91f16700Schasinglulusome point, the library has to convert this information into actual translation
341*91f16700Schasinglulutables to program into the MMU.
342*91f16700Schasinglulu
343*91f16700SchasingluluBefore the ``init_xlat_tables()`` API is called, the library only acts on the
344*91f16700Schasinglulummap regions list. Adding a static or dynamic region at this point through one
345*91f16700Schasingluluof the ``mmap_add*()`` APIs does not affect the translation tables in any way,
346*91f16700Schasingluluthey only get registered in the internal mmap region list. It is only when the
347*91f16700Schasingluluuser calls the ``init_xlat_tables()`` that the translation tables are populated
348*91f16700Schasingluluin memory based on the list of mmap regions registered so far. This is an
349*91f16700Schasingluluoptimization that allows creation of the initial set of translation tables in
350*91f16700Schasingluluone go, rather than having to edit them every time while the MMU is disabled.
351*91f16700Schasinglulu
352*91f16700SchasingluluAfter the ``init_xlat_tables()`` API has been called, only dynamic regions can
353*91f16700Schasinglulube added. Changes to the translation tables (as well as the mmap regions list)
354*91f16700Schasingluluwill take effect immediately.
355*91f16700Schasinglulu
356*91f16700SchasingluluThe memory mapping algorithm
357*91f16700Schasinglulu~~~~~~~~~~~~~~~~~~~~~~~~~~~~
358*91f16700Schasinglulu
359*91f16700SchasingluluThe mapping function is implemented as a recursive algorithm. It is however
360*91f16700Schasinglulubound by the level of depth of the translation tables (the Armv8-A architecture
361*91f16700Schasingluluallows up to 4 lookup levels).
362*91f16700Schasinglulu
363*91f16700SchasingluluBy default [#granularity]_, the algorithm will attempt to minimize the
364*91f16700Schasinglulunumber of translation tables created to satisfy the user's request. It will
365*91f16700Schasinglulufavour mapping a region using the biggest possible blocks, only creating a
366*91f16700Schasinglulusub-table if it is strictly necessary. This is to reduce the memory footprint of
367*91f16700Schasingluluthe firmware.
368*91f16700Schasinglulu
369*91f16700SchasingluluThe most common reason for needing a sub-table is when a specific mapping
370*91f16700Schasinglulurequires a finer granularity. Misaligned regions also require a finer
371*91f16700Schasinglulugranularity than what the user may had originally expected, using a lot more
372*91f16700Schasinglulumemory than expected. The reason is that all levels of translation are
373*91f16700Schasinglulurestricted to address translations of the same granularity as the size of the
374*91f16700Schasinglulublocks of that level.  For example, for a 4 KiB page size, a level 2 block entry
375*91f16700Schasinglulucan only translate up to a granularity of 2 MiB. If the Physical Address is not
376*91f16700Schasinglulualigned to 2 MiB then additional level 3 tables are also needed.
377*91f16700Schasinglulu
378*91f16700SchasingluluNote that not every translation level allows any type of descriptor. Depending
379*91f16700Schasingluluon the page size, levels 0 and 1 of translation may only allow table
380*91f16700Schasingluludescriptors. If a block entry could be able to describe a translation, but that
381*91f16700Schasinglululevel does not allow block descriptors, a table descriptor will have to be used
382*91f16700Schasingluluinstead, as well as additional tables at the next level.
383*91f16700Schasinglulu
384*91f16700Schasinglulu|Alignment Example|
385*91f16700Schasinglulu
386*91f16700SchasingluluThe mmap regions are sorted in a way that simplifies the code that maps
387*91f16700Schasingluluthem. Even though this ordering is only strictly needed for overlapping static
388*91f16700Schasingluluregions, it must also be applied for dynamic regions to maintain a consistent
389*91f16700Schasingluluorder of all regions at all times. As each new region is mapped, existing
390*91f16700Schasingluluentries in the translation tables are checked to ensure consistency. Please
391*91f16700Schasinglulurefer to the comments in the source code of the core module for more details
392*91f16700Schasingluluabout the sorting algorithm in use.
393*91f16700Schasinglulu
394*91f16700SchasingluluThis mapping algorithm does not apply to the MPU library, since the MPU hardware
395*91f16700Schasingluludirectly maps regions by "base" and "limit" (bottom and top) addresses.
396*91f16700Schasinglulu
397*91f16700SchasingluluTLB maintenance operations
398*91f16700Schasinglulu~~~~~~~~~~~~~~~~~~~~~~~~~~
399*91f16700Schasinglulu
400*91f16700SchasingluluThe library takes care of performing TLB maintenance operations when required.
401*91f16700SchasingluluFor example, when the user requests removing a dynamic region, the library
402*91f16700Schasingluluinvalidates all TLB entries associated to that region to ensure that these
403*91f16700Schasingluluchanges are visible to subsequent execution, including speculative execution,
404*91f16700Schasingluluthat uses the changed translation table entries.
405*91f16700Schasinglulu
406*91f16700SchasingluluA counter-example is the initialization of translation tables. In this case,
407*91f16700Schasingluluexplicit TLB maintenance is not required. The Armv8-A architecture guarantees
408*91f16700Schasingluluthat all TLBs are disabled from reset and their contents have no effect on
409*91f16700Schasingluluaddress translation at reset [#tlb-reset-ref]_. Therefore, the TLBs invalidation
410*91f16700Schasingluluis deferred to the ``enable_mmu*()`` family of functions, just before the MMU is
411*91f16700Schasingluluturned on.
412*91f16700Schasinglulu
413*91f16700SchasingluluRegarding enabling and disabling memory management, for the MPU library, to
414*91f16700Schasinglulureduce confusion, calls to enable or disable the MPU use ``mpu`` in their names
415*91f16700Schasingluluin place of ``mmu``. For example, the ``enable_mmu_el2()`` call is changed to
416*91f16700Schasinglulu``enable_mpu_el2()``.
417*91f16700Schasinglulu
418*91f16700SchasingluluTLB invalidation is not required when adding dynamic regions either. Dynamic
419*91f16700Schasingluluregions are not allowed to overlap existing memory region. Therefore, if the
420*91f16700Schasingluludynamic mapping request is deemed legitimate, it automatically concerns memory
421*91f16700Schasingluluthat was not mapped in this translation regime and the library will have
422*91f16700Schasingluluinitialized its corresponding translation table entry to an invalid
423*91f16700Schasingluludescriptor. Given that the TLBs are not architecturally permitted to hold any
424*91f16700Schasingluluinvalid translation table entry [#tlb-no-invalid-entry]_, this means that this
425*91f16700Schasinglulumapping cannot be cached in the TLBs.
426*91f16700Schasinglulu
427*91f16700Schasinglulu.. rubric:: Footnotes
428*91f16700Schasinglulu
429*91f16700Schasinglulu.. [#granularity] That is, when mmap regions do not enforce their mapping
430*91f16700Schasinglulu                  granularity.
431*91f16700Schasinglulu
432*91f16700Schasinglulu.. [#tlb-reset-ref] See section D4.9 ``Translation Lookaside Buffers (TLBs)``,
433*91f16700Schasinglulu                    subsection ``TLB behavior at reset`` in Armv8-A, rev C.a.
434*91f16700Schasinglulu
435*91f16700Schasinglulu.. [#tlb-no-invalid-entry] See section D4.10.1 ``General TLB maintenance
436*91f16700Schasinglulu                           requirements`` in Armv8-A, rev C.a.
437*91f16700Schasinglulu
438*91f16700Schasinglulu--------------
439*91f16700Schasinglulu
440*91f16700Schasinglulu*Copyright (c) 2017-2021, Arm Limited and Contributors. All rights reserved.*
441*91f16700Schasinglulu
442*91f16700Schasinglulu.. |Alignment Example| image:: ../resources/diagrams/xlat_align.png
443