1*91f16700SchasingluluMaximum Power Mitigation Mechanism (MPMM) 2*91f16700Schasinglulu^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 3*91f16700Schasinglulu 4*91f16700Schasinglulu|MPMM| is an optional microarchitectural power management mechanism supported by 5*91f16700Schasinglulusome Arm Armv9-A cores, beginning with the Cortex-X2, Cortex-A710 and 6*91f16700SchasingluluCortex-A510 cores. This mechanism detects and limits high-activity events to 7*91f16700Schasingluluassist in |SoC| processor power domain dynamic power budgeting and limit the 8*91f16700Schasinglulutriggering of whole-rail (i.e. clock chopping) responses to overcurrent 9*91f16700Schasingluluconditions. 10*91f16700Schasinglulu 11*91f16700Schasinglulu|MPMM| is enabled on a per-core basis by the EL3 runtime firmware. The presence 12*91f16700Schasingluluof |MPMM| cannot be determined at runtime by the firmware, and therefore the 13*91f16700Schasingluluplatform must expose this information through one of two possible mechanisms: 14*91f16700Schasinglulu 15*91f16700Schasinglulu- |FCONF|, controlled by the ``ENABLE_MPMM_FCONF`` build option. 16*91f16700Schasinglulu- A platform implementation of the ``plat_mpmm_topology`` function (the 17*91f16700Schasinglulu default). 18*91f16700Schasinglulu 19*91f16700SchasingluluSee :ref:`Maximum Power Mitigation Mechanism (MPMM) Bindings` for documentation 20*91f16700Schasingluluon the |FCONF| device tree bindings. 21*91f16700Schasinglulu 22*91f16700Schasinglulu.. warning:: 23*91f16700Schasinglulu 24*91f16700Schasinglulu |MPMM| exposes gear metrics through the auxiliary |AMU| counters. An 25*91f16700Schasinglulu external power controller can use these metrics to budget SoC power by 26*91f16700Schasinglulu limiting the number of cores that can execute higher-activity workloads or 27*91f16700Schasinglulu switching to a different DVFS operating point. When this is the case, the 28*91f16700Schasinglulu |AMU| counters that make up the |MPMM| gears must be enabled by the EL3 29*91f16700Schasinglulu runtime firmware - please see :ref:`Activity Monitor Auxiliary Counters` for 30*91f16700Schasinglulu documentation on enabling auxiliary |AMU| counters. 31