xref: /arm-trusted-firmware/bl32/tsp/tsp_private.h (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1*91f16700Schasinglulu /*
2*91f16700Schasinglulu  * Copyright (c) 2014-2022, ARM Limited and Contributors. All rights reserved.
3*91f16700Schasinglulu  *
4*91f16700Schasinglulu  * SPDX-License-Identifier: BSD-3-Clause
5*91f16700Schasinglulu  */
6*91f16700Schasinglulu 
7*91f16700Schasinglulu #ifndef TSP_PRIVATE_H
8*91f16700Schasinglulu #define TSP_PRIVATE_H
9*91f16700Schasinglulu 
10*91f16700Schasinglulu /*******************************************************************************
11*91f16700Schasinglulu  * The TSP memory footprint starts at address BL32_BASE and ends with the
12*91f16700Schasinglulu  * linker symbol __BL32_END__. Use these addresses to compute the TSP image
13*91f16700Schasinglulu  * size.
14*91f16700Schasinglulu  ******************************************************************************/
15*91f16700Schasinglulu #define BL32_TOTAL_LIMIT BL32_END
16*91f16700Schasinglulu #define BL32_TOTAL_SIZE (BL32_TOTAL_LIMIT - (unsigned long) BL32_BASE)
17*91f16700Schasinglulu 
18*91f16700Schasinglulu #ifndef __ASSEMBLER__
19*91f16700Schasinglulu 
20*91f16700Schasinglulu #include <stdint.h>
21*91f16700Schasinglulu 
22*91f16700Schasinglulu #include <bl32/tsp/tsp.h>
23*91f16700Schasinglulu #include <lib/cassert.h>
24*91f16700Schasinglulu #include <lib/spinlock.h>
25*91f16700Schasinglulu #include <smccc_helpers.h>
26*91f16700Schasinglulu 
27*91f16700Schasinglulu typedef struct work_statistics {
28*91f16700Schasinglulu 	/* Number of s-el1 interrupts on this cpu */
29*91f16700Schasinglulu 	uint32_t sel1_intr_count;
30*91f16700Schasinglulu 	/* Number of non s-el1 interrupts on this cpu which preempted TSP */
31*91f16700Schasinglulu 	uint32_t preempt_intr_count;
32*91f16700Schasinglulu 	/* Number of sync s-el1 interrupts on this cpu */
33*91f16700Schasinglulu 	uint32_t sync_sel1_intr_count;
34*91f16700Schasinglulu 	/* Number of s-el1 interrupts returns on this cpu */
35*91f16700Schasinglulu 	uint32_t sync_sel1_intr_ret_count;
36*91f16700Schasinglulu 	uint32_t smc_count;		/* Number of returns on this cpu */
37*91f16700Schasinglulu 	uint32_t eret_count;		/* Number of entries on this cpu */
38*91f16700Schasinglulu 	uint32_t cpu_on_count;		/* Number of cpu on requests */
39*91f16700Schasinglulu 	uint32_t cpu_off_count;		/* Number of cpu off requests */
40*91f16700Schasinglulu 	uint32_t cpu_suspend_count;	/* Number of cpu suspend requests */
41*91f16700Schasinglulu 	uint32_t cpu_resume_count;	/* Number of cpu resume requests */
42*91f16700Schasinglulu } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
43*91f16700Schasinglulu 
44*91f16700Schasinglulu /* Macros to access members of the above structure using their offsets */
45*91f16700Schasinglulu #define read_sp_arg(args, offset)	((args)->_regs[offset >> 3])
46*91f16700Schasinglulu #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3])	\
47*91f16700Schasinglulu 					 = val)
48*91f16700Schasinglulu 
49*91f16700Schasinglulu uint128_t tsp_get_magic(void);
50*91f16700Schasinglulu 
51*91f16700Schasinglulu smc_args_t *set_smc_args(uint64_t arg0,
52*91f16700Schasinglulu 			 uint64_t arg1,
53*91f16700Schasinglulu 			 uint64_t arg2,
54*91f16700Schasinglulu 			 uint64_t arg3,
55*91f16700Schasinglulu 			 uint64_t arg4,
56*91f16700Schasinglulu 			 uint64_t arg5,
57*91f16700Schasinglulu 			 uint64_t arg6,
58*91f16700Schasinglulu 			 uint64_t arg7);
59*91f16700Schasinglulu smc_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl,
60*91f16700Schasinglulu 				uint64_t arg1,
61*91f16700Schasinglulu 				uint64_t arg2,
62*91f16700Schasinglulu 				uint64_t arg3,
63*91f16700Schasinglulu 				uint64_t arg4,
64*91f16700Schasinglulu 				uint64_t arg5,
65*91f16700Schasinglulu 				uint64_t arg6,
66*91f16700Schasinglulu 				uint64_t arg7);
67*91f16700Schasinglulu smc_args_t *tsp_cpu_suspend_main(uint64_t arg0,
68*91f16700Schasinglulu 				 uint64_t arg1,
69*91f16700Schasinglulu 				 uint64_t arg2,
70*91f16700Schasinglulu 				 uint64_t arg3,
71*91f16700Schasinglulu 				 uint64_t arg4,
72*91f16700Schasinglulu 				 uint64_t arg5,
73*91f16700Schasinglulu 				 uint64_t arg6,
74*91f16700Schasinglulu 				 uint64_t arg7);
75*91f16700Schasinglulu smc_args_t *tsp_cpu_on_main(void);
76*91f16700Schasinglulu smc_args_t *tsp_cpu_off_main(uint64_t arg0,
77*91f16700Schasinglulu 			     uint64_t arg1,
78*91f16700Schasinglulu 			     uint64_t arg2,
79*91f16700Schasinglulu 			     uint64_t arg3,
80*91f16700Schasinglulu 			     uint64_t arg4,
81*91f16700Schasinglulu 			     uint64_t arg5,
82*91f16700Schasinglulu 			     uint64_t arg6,
83*91f16700Schasinglulu 			     uint64_t arg7);
84*91f16700Schasinglulu 
85*91f16700Schasinglulu /* Generic Timer functions */
86*91f16700Schasinglulu void tsp_generic_timer_start(void);
87*91f16700Schasinglulu void tsp_generic_timer_handler(void);
88*91f16700Schasinglulu void tsp_generic_timer_stop(void);
89*91f16700Schasinglulu void tsp_generic_timer_save(void);
90*91f16700Schasinglulu void tsp_generic_timer_restore(void);
91*91f16700Schasinglulu 
92*91f16700Schasinglulu /* S-EL1 interrupt management functions */
93*91f16700Schasinglulu void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3);
94*91f16700Schasinglulu 
95*91f16700Schasinglulu 
96*91f16700Schasinglulu /* Data structure to keep track of TSP statistics */
97*91f16700Schasinglulu extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT];
98*91f16700Schasinglulu 
99*91f16700Schasinglulu /* Vector table of jumps */
100*91f16700Schasinglulu extern tsp_vectors_t tsp_vector_table;
101*91f16700Schasinglulu 
102*91f16700Schasinglulu /* functions */
103*91f16700Schasinglulu int32_t tsp_common_int_handler(void);
104*91f16700Schasinglulu int32_t tsp_handle_preemption(void);
105*91f16700Schasinglulu 
106*91f16700Schasinglulu smc_args_t *tsp_abort_smc_handler(uint64_t func,
107*91f16700Schasinglulu 				  uint64_t arg1,
108*91f16700Schasinglulu 				  uint64_t arg2,
109*91f16700Schasinglulu 				  uint64_t arg3,
110*91f16700Schasinglulu 				  uint64_t arg4,
111*91f16700Schasinglulu 				  uint64_t arg5,
112*91f16700Schasinglulu 				  uint64_t arg6,
113*91f16700Schasinglulu 				  uint64_t arg7);
114*91f16700Schasinglulu 
115*91f16700Schasinglulu smc_args_t *tsp_smc_handler(uint64_t func,
116*91f16700Schasinglulu 			    uint64_t arg1,
117*91f16700Schasinglulu 			    uint64_t arg2,
118*91f16700Schasinglulu 			    uint64_t arg3,
119*91f16700Schasinglulu 			    uint64_t arg4,
120*91f16700Schasinglulu 			    uint64_t arg5,
121*91f16700Schasinglulu 			    uint64_t arg6,
122*91f16700Schasinglulu 			    uint64_t arg7);
123*91f16700Schasinglulu 
124*91f16700Schasinglulu smc_args_t *tsp_system_reset_main(uint64_t arg0,
125*91f16700Schasinglulu 				  uint64_t arg1,
126*91f16700Schasinglulu 				  uint64_t arg2,
127*91f16700Schasinglulu 				  uint64_t arg3,
128*91f16700Schasinglulu 				  uint64_t arg4,
129*91f16700Schasinglulu 				  uint64_t arg5,
130*91f16700Schasinglulu 				  uint64_t arg6,
131*91f16700Schasinglulu 				  uint64_t arg7);
132*91f16700Schasinglulu 
133*91f16700Schasinglulu smc_args_t *tsp_system_off_main(uint64_t arg0,
134*91f16700Schasinglulu 				uint64_t arg1,
135*91f16700Schasinglulu 				uint64_t arg2,
136*91f16700Schasinglulu 				uint64_t arg3,
137*91f16700Schasinglulu 				uint64_t arg4,
138*91f16700Schasinglulu 				uint64_t arg5,
139*91f16700Schasinglulu 				uint64_t arg6,
140*91f16700Schasinglulu 				uint64_t arg7);
141*91f16700Schasinglulu 
142*91f16700Schasinglulu uint64_t tsp_main(void);
143*91f16700Schasinglulu #endif /* __ASSEMBLER__ */
144*91f16700Schasinglulu 
145*91f16700Schasinglulu #endif /* TSP_PRIVATE_H */
146