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Searched defs:REG (Results 1 – 5 of 5) sorted by relevance

/arm-trusted-firmware/drivers/arm/gic/v3/
H A Dgicv3_private.h29 #define BIT_NUM(REG, id) \ argument
38 #define GICD_OFFSET_8(REG, id) \ argument
43 #define GICD_OFFSET(REG, id) \ argument
49 GICD_OFFSET_64(REG,id) global() argument
56 GICD_OFFSET_8(REG,id) global() argument
59 GICD_OFFSET(REG,id) global() argument
62 GICD_OFFSET_64(REG,id) global() argument
70 GICD_READ(REG,base,id) global() argument
73 GICD_READ_64(REG,base,id) global() argument
76 GICD_WRITE_8(REG,base,id,val) global() argument
79 GICD_WRITE(REG,base,id,val) global() argument
82 GICD_WRITE_64(REG,base,id,val) global() argument
90 GICD_GET_BIT(REG,base,id) global() argument
95 GICD_SET_BIT(REG,base,id) global() argument
100 GICD_CLR_BIT(REG,base,id) global() argument
105 GICD_WRITE_BIT(REG,base,id) global() argument
115 GICR_OFFSET_8(REG,id) global() argument
120 GICR_OFFSET(REG,id) global() argument
126 GICR_OFFSET_8(REG,id) global() argument
129 GICR_OFFSET(REG,id) global() argument
134 GICR_READ(REG,base,id) global() argument
137 GICR_WRITE_8(REG,base,id,val) global() argument
140 GICR_WRITE(REG,base,id,val) global() argument
148 GICR_GET_BIT(REG,base,id) global() argument
153 GICR_WRITE_BIT(REG,base,id) global() argument
158 GICR_SET_BIT(REG,base,id) global() argument
163 GICR_CLR_BIT(REG,base,id) global() argument
[all...]
H A Dgicv3_main.c51 #define RESTORE_GICD_REGS(base, ctx, intr_num, reg, REG) \ argument
61 #define SAVE_GICD_REGS(base, ctx, intr_num, reg, REG) \ argument
71 #define RESTORE_GICD_EREGS(base, ctx, intr_num, reg, REG) \ argument
82 SAVE_GICD_EREGS(base,ctx,intr_num,reg,REG) global() argument
92 SAVE_GICD_EREGS(base,ctx,intr_num,reg,REG) global() argument
93 RESTORE_GICD_EREGS(base,ctx,intr_num,reg,REG) global() argument
[all...]
/arm-trusted-firmware/plat/mediatek/mt8195/drivers/apusys/
H A Dapupwr_clkctl_def.h71 #define apupwr_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) argument
72 #define apupwr_writel_relax(VAL, REG) mmio_write_32_relax((uintptr_t)REG, VAL) argument
73 #define apupwr_readl(REG) mmio_read_32((uintptr_t)REG) argument
74 #define apupwr_clrbits(VAL, REG) mmio_clrbits_32((uintptr_t)REG, VAL) argument
75 #define apupwr_setbits(VAL, REG) mmio_setbits_32((uintptr_t)REG, VA argument
76 apupwr_clrsetbits(CLR_VAL,SET_VAL,REG) global() argument
[all...]
/arm-trusted-firmware/plat/mediatek/mt8192/drivers/apusys/
H A Dmtk_apusys_apc_def.h85 #define apuapc_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) argument
86 #define apuapc_readl(REG) mmio_read_32((uintptr_t)REG) argument
/arm-trusted-firmware/plat/mediatek/mt8192/drivers/devapc/
H A Ddevapc.h173 #define devapc_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) argument
174 #define devapc_readl(REG) mmio_read_32((uintptr_t)REG) argument