1 /* 2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 #include <drivers/arm/gic600_multichip.h> 9 #include <plat/arm/common/plat_arm.h> 10 #include <plat/common/platform.h> 11 #include <sgi_soc_platform_def.h> 12 #include <sgi_plat.h> 13 14 #if defined(IMAGE_BL31) 15 static const mmap_region_t rdn1edge_dynamic_mmap[] = { 16 ARM_MAP_SHARED_RAM_REMOTE_CHIP(1), 17 CSS_SGI_MAP_DEVICE_REMOTE_CHIP(1), 18 SOC_CSS_MAP_DEVICE_REMOTE_CHIP(1) 19 }; 20 21 static struct gic600_multichip_data rdn1e1_multichip_data __init = { 22 .rt_owner_base = PLAT_ARM_GICD_BASE, 23 .rt_owner = 0, 24 .chip_count = CSS_SGI_CHIP_COUNT, 25 .chip_addrs = { 26 PLAT_ARM_GICD_BASE >> 16, 27 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1)) >> 16 28 }, 29 .spi_ids = { 30 {PLAT_ARM_GICD_BASE, 32, 255}, 31 {0, 0, 0} 32 } 33 }; 34 35 static uintptr_t rdn1e1_multichip_gicr_frames[] = { 36 PLAT_ARM_GICR_BASE, /* Chip 0's GICR Base */ 37 PLAT_ARM_GICR_BASE + 38 CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1), /* Chip 1's GICR BASE */ 39 UL(0) /* Zero Termination */ 40 }; 41 #endif /* IMAGE_BL31 */ 42 43 unsigned int plat_arm_sgi_get_platform_id(void) 44 { 45 return mmio_read_32(SID_REG_BASE + SID_SYSTEM_ID_OFFSET) 46 & SID_SYSTEM_ID_PART_NUM_MASK; 47 } 48 49 unsigned int plat_arm_sgi_get_config_id(void) 50 { 51 return mmio_read_32(SID_REG_BASE + SID_SYSTEM_CFG_OFFSET); 52 } 53 54 unsigned int plat_arm_sgi_get_multi_chip_mode(void) 55 { 56 return (mmio_read_32(SID_REG_BASE + SID_NODE_ID_OFFSET) & 57 SID_MULTI_CHIP_MODE_MASK) >> SID_MULTI_CHIP_MODE_SHIFT; 58 } 59 60 /* 61 * IMAGE_BL31 macro is added to build bl31_platform_setup function only for BL31 62 * because PLAT_XLAT_TABLES_DYNAMIC macro is set to build only for BL31 and not 63 * for other stages. 64 */ 65 #if defined(IMAGE_BL31) 66 void bl31_platform_setup(void) 67 { 68 unsigned int i; 69 int ret; 70 71 if (plat_arm_sgi_get_multi_chip_mode() == 0 && CSS_SGI_CHIP_COUNT > 1) { 72 ERROR("Chip Count is set to %d but multi-chip mode not enabled\n", 73 CSS_SGI_CHIP_COUNT); 74 panic(); 75 } else if (plat_arm_sgi_get_multi_chip_mode() == 1 && 76 CSS_SGI_CHIP_COUNT > 1) { 77 INFO("Enabling support for multi-chip in RD-N1-Edge\n"); 78 79 for (i = 0; i < ARRAY_SIZE(rdn1edge_dynamic_mmap); i++) { 80 ret = mmap_add_dynamic_region( 81 rdn1edge_dynamic_mmap[i].base_pa, 82 rdn1edge_dynamic_mmap[i].base_va, 83 rdn1edge_dynamic_mmap[i].size, 84 rdn1edge_dynamic_mmap[i].attr 85 ); 86 if (ret != 0) { 87 ERROR("Failed to add dynamic mmap entry\n"); 88 panic(); 89 } 90 } 91 92 plat_arm_override_gicr_frames(rdn1e1_multichip_gicr_frames); 93 gic600_multichip_init(&rdn1e1_multichip_data); 94 } 95 96 sgi_bl31_common_platform_setup(); 97 } 98 #endif /* IMAGE_BL31 */ 99