xref: /arm-trusted-firmware/plat/intel/soc/agilex5/soc/agilex5_mmc.c (revision 91f16700b400a8c0651d24a598fc48ee2997a0d7)
1 /*
2  * Copyright (c) 2020-2023, Intel Corporation. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #include <lib/mmio.h>
7 
8 #include "agilex5_clock_manager.h"
9 #include "agilex5_system_manager.h"
10 
11 void agx5_mmc_init(void)
12 {
13 // TODO: To update when handoff data is ready
14 
15 	//mmio_clrbits_32(CLKMGR_PERPLL + CLKMGR_PERPLL_EN,
16 	//	CLKMGR_PERPLL_EN_SDMMCCLK);
17 	//mmio_write_32(SOCFPGA_SYSMGR(SDMMC),
18 	//	SYSMGR_SDMMC_SMPLSEL(0) | SYSMGR_SDMMC_DRVSEL(3));
19 	//mmio_setbits_32(CLKMGR_PERPLL + CLKMGR_PERPLL_EN,
20 	//	CLKMGR_PERPLL_EN_SDMMCCLK);
21 
22 }
23