1 /* 2 * Copyright (c) 2013-2023, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 8 /******************************************************************************* 9 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a 10 * plug-in component to the Secure Monitor, registered as a runtime service. The 11 * SPD is expected to be a functional extension of the Secure Payload (SP) that 12 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting 13 * the Trusted OS/Applications range to the dispatcher. The SPD will either 14 * handle the request locally or delegate it to the Secure Payload. It is also 15 * responsible for initialising and maintaining communication with the SP. 16 ******************************************************************************/ 17 #include <assert.h> 18 #include <errno.h> 19 #include <inttypes.h> 20 #include <stddef.h> 21 22 #include <arch_helpers.h> 23 #include <bl31/bl31.h> 24 #include <common/bl_common.h> 25 #include <common/debug.h> 26 #include <common/runtime_svc.h> 27 #include <lib/coreboot.h> 28 #include <lib/el3_runtime/context_mgmt.h> 29 #include <lib/optee_utils.h> 30 #include <lib/xlat_tables/xlat_tables_v2.h> 31 #if OPTEE_ALLOW_SMC_LOAD 32 #include <libfdt.h> 33 #endif /* OPTEE_ALLOW_SMC_LOAD */ 34 #include <plat/common/platform.h> 35 #include <tools_share/uuid.h> 36 37 #include "opteed_private.h" 38 #include "teesmc_opteed.h" 39 40 /******************************************************************************* 41 * Address of the entrypoint vector table in OPTEE. It is 42 * initialised once on the primary core after a cold boot. 43 ******************************************************************************/ 44 struct optee_vectors *optee_vector_table; 45 46 /******************************************************************************* 47 * Array to keep track of per-cpu OPTEE state 48 ******************************************************************************/ 49 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT]; 50 uint32_t opteed_rw; 51 52 #if OPTEE_ALLOW_SMC_LOAD 53 static bool opteed_allow_load; 54 /* OP-TEE image loading service UUID */ 55 DEFINE_SVC_UUID2(optee_image_load_uuid, 56 0xb1eafba3, 0x5d31, 0x4612, 0xb9, 0x06, 57 0xc4, 0xc7, 0xa4, 0xbe, 0x3c, 0xc0); 58 59 #define OPTEED_FDT_SIZE 256 60 static uint8_t fdt_buf[OPTEED_FDT_SIZE] __aligned(CACHE_WRITEBACK_GRANULE); 61 62 #else 63 static int32_t opteed_init(void); 64 #endif 65 66 uint64_t dual32to64(uint32_t high, uint32_t low) 67 { 68 return ((uint64_t)high << 32) | low; 69 } 70 71 /******************************************************************************* 72 * This function is the handler registered for S-EL1 interrupts by the 73 * OPTEED. It validates the interrupt and upon success arranges entry into 74 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt. 75 ******************************************************************************/ 76 static __attribute__((__unused__)) 77 uint64_t opteed_sel1_interrupt_handler(uint32_t id, 78 uint32_t flags, 79 void *handle, 80 void *cookie) 81 { 82 uint32_t linear_id; 83 optee_context_t *optee_ctx; 84 85 /* Check the security state when the exception was generated */ 86 assert(get_interrupt_src_ss(flags) == NON_SECURE); 87 88 /* Sanity check the pointer to this cpu's context */ 89 assert(handle == cm_get_context(NON_SECURE)); 90 91 /* Save the non-secure context before entering the OPTEE */ 92 cm_el1_sysregs_context_save(NON_SECURE); 93 94 /* Get a reference to this cpu's OPTEE context */ 95 linear_id = plat_my_core_pos(); 96 optee_ctx = &opteed_sp_context[linear_id]; 97 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 98 99 cm_set_elr_el3(SECURE, (uint64_t)&optee_vector_table->fiq_entry); 100 cm_el1_sysregs_context_restore(SECURE); 101 cm_set_next_eret_context(SECURE); 102 103 /* 104 * Tell the OPTEE that it has to handle an FIQ (synchronously). 105 * Also the instruction in normal world where the interrupt was 106 * generated is passed for debugging purposes. It is safe to 107 * retrieve this address from ELR_EL3 as the secure context will 108 * not take effect until el3_exit(). 109 */ 110 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3()); 111 } 112 113 /******************************************************************************* 114 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type 115 * (aarch32/aarch64) if not already known and initialises the context for entry 116 * into OPTEE for its initialization. 117 ******************************************************************************/ 118 static int32_t opteed_setup(void) 119 { 120 #if OPTEE_ALLOW_SMC_LOAD 121 opteed_allow_load = true; 122 INFO("Delaying OP-TEE setup until we receive an SMC call to load it\n"); 123 return 0; 124 #else 125 entry_point_info_t *optee_ep_info; 126 uint32_t linear_id; 127 uint64_t opteed_pageable_part; 128 uint64_t opteed_mem_limit; 129 uint64_t dt_addr; 130 131 linear_id = plat_my_core_pos(); 132 133 /* 134 * Get information about the Secure Payload (BL32) image. Its 135 * absence is a critical failure. TODO: Add support to 136 * conditionally include the SPD service 137 */ 138 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 139 if (!optee_ep_info) { 140 WARN("No OPTEE provided by BL2 boot loader, Booting device" 141 " without OPTEE initialization. SMC`s destined for OPTEE" 142 " will return SMC_UNK\n"); 143 return 1; 144 } 145 146 /* 147 * If there's no valid entry point for SP, we return a non-zero value 148 * signalling failure initializing the service. We bail out without 149 * registering any handlers 150 */ 151 if (!optee_ep_info->pc) 152 return 1; 153 154 opteed_rw = optee_ep_info->args.arg0; 155 opteed_pageable_part = optee_ep_info->args.arg1; 156 opteed_mem_limit = optee_ep_info->args.arg2; 157 dt_addr = optee_ep_info->args.arg3; 158 159 opteed_init_optee_ep_state(optee_ep_info, 160 opteed_rw, 161 optee_ep_info->pc, 162 opteed_pageable_part, 163 opteed_mem_limit, 164 dt_addr, 165 &opteed_sp_context[linear_id]); 166 167 /* 168 * All OPTEED initialization done. Now register our init function with 169 * BL31 for deferred invocation 170 */ 171 bl31_register_bl32_init(&opteed_init); 172 173 return 0; 174 #endif /* OPTEE_ALLOW_SMC_LOAD */ 175 } 176 177 /******************************************************************************* 178 * This function passes control to the OPTEE image (BL32) for the first time 179 * on the primary cpu after a cold boot. It assumes that a valid secure 180 * context has already been created by opteed_setup() which can be directly 181 * used. It also assumes that a valid non-secure context has been 182 * initialised by PSCI so it does not need to save and restore any 183 * non-secure state. This function performs a synchronous entry into 184 * OPTEE. OPTEE passes control back to this routine through a SMC. This returns 185 * a non-zero value on success and zero on failure. 186 ******************************************************************************/ 187 static int32_t 188 opteed_init_with_entry_point(entry_point_info_t *optee_entry_point) 189 { 190 uint32_t linear_id = plat_my_core_pos(); 191 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 192 uint64_t rc; 193 assert(optee_entry_point); 194 195 cm_init_my_context(optee_entry_point); 196 197 /* 198 * Arrange for an entry into OPTEE. It will be returned via 199 * OPTEE_ENTRY_DONE case 200 */ 201 rc = opteed_synchronous_sp_entry(optee_ctx); 202 assert(rc != 0); 203 204 return rc; 205 } 206 207 #if !OPTEE_ALLOW_SMC_LOAD 208 static int32_t opteed_init(void) 209 { 210 entry_point_info_t *optee_entry_point; 211 /* 212 * Get information about the OP-TEE (BL32) image. Its 213 * absence is a critical failure. 214 */ 215 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE); 216 return opteed_init_with_entry_point(optee_entry_point); 217 } 218 #endif /* !OPTEE_ALLOW_SMC_LOAD */ 219 220 #if OPTEE_ALLOW_SMC_LOAD 221 #if COREBOOT 222 /* 223 * Adds a firmware/coreboot node with the coreboot table information to a device 224 * tree. Returns zero on success or if there is no coreboot table information; 225 * failure code otherwise. 226 */ 227 static int add_coreboot_node(void *fdt) 228 { 229 int ret; 230 uint64_t coreboot_table_addr; 231 uint32_t coreboot_table_size; 232 struct { 233 uint64_t addr; 234 uint32_t size; 235 } reg_node; 236 coreboot_get_table_location(&coreboot_table_addr, &coreboot_table_size); 237 if (!coreboot_table_addr || !coreboot_table_size) { 238 WARN("Unable to get coreboot table location for device tree"); 239 return 0; 240 } 241 ret = fdt_begin_node(fdt, "firmware"); 242 if (ret) 243 return ret; 244 245 ret = fdt_property(fdt, "ranges", NULL, 0); 246 if (ret) 247 return ret; 248 249 ret = fdt_begin_node(fdt, "coreboot"); 250 if (ret) 251 return ret; 252 253 ret = fdt_property_string(fdt, "compatible", "coreboot"); 254 if (ret) 255 return ret; 256 257 reg_node.addr = cpu_to_fdt64(coreboot_table_addr); 258 reg_node.size = cpu_to_fdt32(coreboot_table_size); 259 ret = fdt_property(fdt, "reg", ®_node, 260 sizeof(uint64_t) + sizeof(uint32_t)); 261 if (ret) 262 return ret; 263 264 ret = fdt_end_node(fdt); 265 if (ret) 266 return ret; 267 268 return fdt_end_node(fdt); 269 } 270 #endif /* COREBOOT */ 271 272 /* 273 * Creates a device tree for passing into OP-TEE. Currently is populated with 274 * the coreboot table address. 275 * Returns 0 on success, error code otherwise. 276 */ 277 static int create_opteed_dt(void) 278 { 279 int ret; 280 281 ret = fdt_create(fdt_buf, OPTEED_FDT_SIZE); 282 if (ret) 283 return ret; 284 285 ret = fdt_finish_reservemap(fdt_buf); 286 if (ret) 287 return ret; 288 289 ret = fdt_begin_node(fdt_buf, ""); 290 if (ret) 291 return ret; 292 293 #if COREBOOT 294 ret = add_coreboot_node(fdt_buf); 295 if (ret) 296 return ret; 297 #endif /* COREBOOT */ 298 299 ret = fdt_end_node(fdt_buf); 300 if (ret) 301 return ret; 302 303 return fdt_finish(fdt_buf); 304 } 305 306 /******************************************************************************* 307 * This function is responsible for handling the SMC that loads the OP-TEE 308 * binary image via a non-secure SMC call. It takes the size and physical 309 * address of the payload as parameters. 310 ******************************************************************************/ 311 static int32_t opteed_handle_smc_load(uint64_t data_size, uint32_t data_pa) 312 { 313 uintptr_t data_va = data_pa; 314 uint64_t mapped_data_pa; 315 uintptr_t mapped_data_va; 316 uint64_t data_map_size; 317 int32_t rc; 318 optee_header_t *image_header; 319 uint8_t *image_ptr; 320 uint64_t target_pa; 321 uint64_t target_end_pa; 322 uint64_t image_pa; 323 uintptr_t image_va; 324 optee_image_t *curr_image; 325 uintptr_t target_va; 326 uint64_t target_size; 327 entry_point_info_t optee_ep_info; 328 uint32_t linear_id = plat_my_core_pos(); 329 uint64_t dt_addr = 0; 330 331 mapped_data_pa = page_align(data_pa, DOWN); 332 mapped_data_va = mapped_data_pa; 333 data_map_size = page_align(data_size + (mapped_data_pa - data_pa), UP); 334 335 /* 336 * We do not validate the passed in address because we are trusting the 337 * non-secure world at this point still. 338 */ 339 rc = mmap_add_dynamic_region(mapped_data_pa, mapped_data_va, 340 data_map_size, MT_MEMORY | MT_RO | MT_NS); 341 if (rc != 0) { 342 return rc; 343 } 344 345 image_header = (optee_header_t *)data_va; 346 if (image_header->magic != TEE_MAGIC_NUM_OPTEE || 347 image_header->version != 2 || image_header->nb_images != 1) { 348 mmap_remove_dynamic_region(mapped_data_va, data_map_size); 349 return -EINVAL; 350 } 351 352 image_ptr = (uint8_t *)data_va + sizeof(optee_header_t) + 353 sizeof(optee_image_t); 354 if (image_header->arch == 1) { 355 opteed_rw = OPTEE_AARCH64; 356 } else { 357 opteed_rw = OPTEE_AARCH32; 358 } 359 360 curr_image = &image_header->optee_image_list[0]; 361 image_pa = dual32to64(curr_image->load_addr_hi, 362 curr_image->load_addr_lo); 363 image_va = image_pa; 364 target_end_pa = image_pa + curr_image->size; 365 366 /* Now also map the memory we want to copy it to. */ 367 target_pa = page_align(image_pa, DOWN); 368 target_va = target_pa; 369 target_size = page_align(target_end_pa, UP) - target_pa; 370 371 rc = mmap_add_dynamic_region(target_pa, target_va, target_size, 372 MT_MEMORY | MT_RW | MT_SECURE); 373 if (rc != 0) { 374 mmap_remove_dynamic_region(mapped_data_va, data_map_size); 375 return rc; 376 } 377 378 INFO("Loaded OP-TEE via SMC: size %d addr 0x%" PRIx64 "\n", 379 curr_image->size, image_va); 380 381 memcpy((void *)image_va, image_ptr, curr_image->size); 382 flush_dcache_range(target_pa, target_size); 383 384 mmap_remove_dynamic_region(mapped_data_va, data_map_size); 385 mmap_remove_dynamic_region(target_va, target_size); 386 387 /* Save the non-secure state */ 388 cm_el1_sysregs_context_save(NON_SECURE); 389 390 rc = create_opteed_dt(); 391 if (rc) { 392 ERROR("Failed device tree creation %d\n", rc); 393 return rc; 394 } 395 dt_addr = (uint64_t)fdt_buf; 396 flush_dcache_range(dt_addr, OPTEED_FDT_SIZE); 397 398 opteed_init_optee_ep_state(&optee_ep_info, 399 opteed_rw, 400 image_pa, 401 0, 402 0, 403 dt_addr, 404 &opteed_sp_context[linear_id]); 405 if (opteed_init_with_entry_point(&optee_ep_info) == 0) { 406 rc = -EFAULT; 407 } 408 409 /* Restore non-secure state */ 410 cm_el1_sysregs_context_restore(NON_SECURE); 411 cm_set_next_eret_context(NON_SECURE); 412 413 return rc; 414 } 415 #endif /* OPTEE_ALLOW_SMC_LOAD */ 416 417 /******************************************************************************* 418 * This function is responsible for handling all SMCs in the Trusted OS/App 419 * range from the non-secure state as defined in the SMC Calling Convention 420 * Document. It is also responsible for communicating with the Secure 421 * payload to delegate work and return results back to the non-secure 422 * state. Lastly it will also return any information that OPTEE needs to do 423 * the work assigned to it. 424 ******************************************************************************/ 425 static uintptr_t opteed_smc_handler(uint32_t smc_fid, 426 u_register_t x1, 427 u_register_t x2, 428 u_register_t x3, 429 u_register_t x4, 430 void *cookie, 431 void *handle, 432 u_register_t flags) 433 { 434 cpu_context_t *ns_cpu_context; 435 uint32_t linear_id = plat_my_core_pos(); 436 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 437 uint64_t __attribute__((__unused__)) rc; 438 439 /* 440 * Determine which security state this SMC originated from 441 */ 442 443 if (is_caller_non_secure(flags)) { 444 #if OPTEE_ALLOW_SMC_LOAD 445 if (opteed_allow_load && smc_fid == NSSMC_OPTEED_CALL_UID) { 446 /* Provide the UUID of the image loading service. */ 447 SMC_UUID_RET(handle, optee_image_load_uuid); 448 } 449 if (smc_fid == NSSMC_OPTEED_CALL_LOAD_IMAGE) { 450 /* 451 * TODO: Consider wiping the code for SMC loading from 452 * memory after it has been invoked similar to what is 453 * done under RECLAIM_INIT, but extended to happen 454 * later. 455 */ 456 if (!opteed_allow_load) { 457 SMC_RET1(handle, -EPERM); 458 } 459 460 opteed_allow_load = false; 461 uint64_t data_size = dual32to64(x1, x2); 462 uint64_t data_pa = dual32to64(x3, x4); 463 if (!data_size || !data_pa) { 464 /* 465 * This is invoked when the OP-TEE image didn't 466 * load correctly in the kernel but we want to 467 * block off loading of it later for security 468 * reasons. 469 */ 470 SMC_RET1(handle, -EINVAL); 471 } 472 SMC_RET1(handle, opteed_handle_smc_load( 473 data_size, data_pa)); 474 } 475 #endif /* OPTEE_ALLOW_SMC_LOAD */ 476 /* 477 * This is a fresh request from the non-secure client. 478 * The parameters are in x1 and x2. Figure out which 479 * registers need to be preserved, save the non-secure 480 * state and send the request to the secure payload. 481 */ 482 assert(handle == cm_get_context(NON_SECURE)); 483 484 cm_el1_sysregs_context_save(NON_SECURE); 485 486 /* 487 * We are done stashing the non-secure context. Ask the 488 * OP-TEE to do the work now. If we are loading vi an SMC, 489 * then we also need to init this CPU context if not done 490 * already. 491 */ 492 if (optee_vector_table == NULL) { 493 SMC_RET1(handle, -EINVAL); 494 } 495 496 if (get_optee_pstate(optee_ctx->state) == 497 OPTEE_PSTATE_UNKNOWN) { 498 opteed_cpu_on_finish_handler(0); 499 } 500 501 /* 502 * Verify if there is a valid context to use, copy the 503 * operation type and parameters to the secure context 504 * and jump to the fast smc entry point in the secure 505 * payload. Entry into S-EL1 will take place upon exit 506 * from this function. 507 */ 508 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 509 510 /* Set appropriate entry for SMC. 511 * We expect OPTEE to manage the PSTATE.I and PSTATE.F 512 * flags as appropriate. 513 */ 514 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) { 515 cm_set_elr_el3(SECURE, (uint64_t) 516 &optee_vector_table->fast_smc_entry); 517 } else { 518 cm_set_elr_el3(SECURE, (uint64_t) 519 &optee_vector_table->yield_smc_entry); 520 } 521 522 cm_el1_sysregs_context_restore(SECURE); 523 cm_set_next_eret_context(SECURE); 524 525 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 526 CTX_GPREG_X4, 527 read_ctx_reg(get_gpregs_ctx(handle), 528 CTX_GPREG_X4)); 529 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 530 CTX_GPREG_X5, 531 read_ctx_reg(get_gpregs_ctx(handle), 532 CTX_GPREG_X5)); 533 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 534 CTX_GPREG_X6, 535 read_ctx_reg(get_gpregs_ctx(handle), 536 CTX_GPREG_X6)); 537 /* Propagate hypervisor client ID */ 538 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 539 CTX_GPREG_X7, 540 read_ctx_reg(get_gpregs_ctx(handle), 541 CTX_GPREG_X7)); 542 543 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3); 544 } 545 546 /* 547 * Returning from OPTEE 548 */ 549 550 switch (smc_fid) { 551 /* 552 * OPTEE has finished initialising itself after a cold boot 553 */ 554 case TEESMC_OPTEED_RETURN_ENTRY_DONE: 555 /* 556 * Stash the OPTEE entry points information. This is done 557 * only once on the primary cpu 558 */ 559 assert(optee_vector_table == NULL); 560 optee_vector_table = (optee_vectors_t *) x1; 561 562 if (optee_vector_table) { 563 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON); 564 565 /* 566 * OPTEE has been successfully initialized. 567 * Register power management hooks with PSCI 568 */ 569 psci_register_spd_pm_hook(&opteed_pm); 570 571 /* On GICv2 systems, it's required that the build option 572 * GICV2_G0_FOR_EL3 is set to 1 so that Group 0 interrupts 573 * target EL3. 574 * This option determines which type Group0 interrupts maps to, 575 * (INTR_TYPE_S_EL1 or INTR_TYPE_EL3) 576 */ 577 #if (GICV2_G0_FOR_EL3 == 0) 578 /* 579 * Register an interrupt handler for S-EL1 interrupts 580 * when generated during code executing in the 581 * non-secure state. 582 */ 583 flags = 0; 584 set_interrupt_rm_flag(flags, NON_SECURE); 585 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 586 opteed_sel1_interrupt_handler, 587 flags); 588 if (rc) 589 panic(); 590 #endif 591 } 592 593 /* 594 * OPTEE reports completion. The OPTEED must have initiated 595 * the original request through a synchronous entry into 596 * OPTEE. Jump back to the original C runtime context. 597 */ 598 opteed_synchronous_sp_exit(optee_ctx, x1); 599 break; 600 601 602 /* 603 * These function IDs is used only by OP-TEE to indicate it has 604 * finished: 605 * 1. turning itself on in response to an earlier psci 606 * cpu_on request 607 * 2. resuming itself after an earlier psci cpu_suspend 608 * request. 609 */ 610 case TEESMC_OPTEED_RETURN_ON_DONE: 611 case TEESMC_OPTEED_RETURN_RESUME_DONE: 612 613 614 /* 615 * These function IDs is used only by the SP to indicate it has 616 * finished: 617 * 1. suspending itself after an earlier psci cpu_suspend 618 * request. 619 * 2. turning itself off in response to an earlier psci 620 * cpu_off request. 621 */ 622 case TEESMC_OPTEED_RETURN_OFF_DONE: 623 case TEESMC_OPTEED_RETURN_SUSPEND_DONE: 624 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE: 625 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE: 626 627 /* 628 * OPTEE reports completion. The OPTEED must have initiated the 629 * original request through a synchronous entry into OPTEE. 630 * Jump back to the original C runtime context, and pass x1 as 631 * return value to the caller 632 */ 633 opteed_synchronous_sp_exit(optee_ctx, x1); 634 break; 635 636 /* 637 * OPTEE is returning from a call or being preempted from a call, in 638 * either case execution should resume in the normal world. 639 */ 640 case TEESMC_OPTEED_RETURN_CALL_DONE: 641 /* 642 * This is the result from the secure client of an 643 * earlier request. The results are in x0-x3. Copy it 644 * into the non-secure context, save the secure state 645 * and return to the non-secure state. 646 */ 647 assert(handle == cm_get_context(SECURE)); 648 cm_el1_sysregs_context_save(SECURE); 649 650 /* Get a reference to the non-secure context */ 651 ns_cpu_context = cm_get_context(NON_SECURE); 652 assert(ns_cpu_context); 653 654 /* Restore non-secure state */ 655 cm_el1_sysregs_context_restore(NON_SECURE); 656 cm_set_next_eret_context(NON_SECURE); 657 658 SMC_RET4(ns_cpu_context, x1, x2, x3, x4); 659 660 /* 661 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution 662 * should resume in the normal world. 663 */ 664 case TEESMC_OPTEED_RETURN_FIQ_DONE: 665 /* Get a reference to the non-secure context */ 666 ns_cpu_context = cm_get_context(NON_SECURE); 667 assert(ns_cpu_context); 668 669 /* 670 * Restore non-secure state. There is no need to save the 671 * secure system register context since OPTEE was supposed 672 * to preserve it during S-EL1 interrupt handling. 673 */ 674 cm_el1_sysregs_context_restore(NON_SECURE); 675 cm_set_next_eret_context(NON_SECURE); 676 677 SMC_RET0((uint64_t) ns_cpu_context); 678 679 default: 680 panic(); 681 } 682 } 683 684 /* Define an OPTEED runtime service descriptor for fast SMC calls */ 685 DECLARE_RT_SVC( 686 opteed_fast, 687 688 OEN_TOS_START, 689 OEN_TOS_END, 690 SMC_TYPE_FAST, 691 opteed_setup, 692 opteed_smc_handler 693 ); 694 695 /* Define an OPTEED runtime service descriptor for yielding SMC calls */ 696 DECLARE_RT_SVC( 697 opteed_std, 698 699 OEN_TOS_START, 700 OEN_TOS_END, 701 SMC_TYPE_YIELD, 702 NULL, 703 opteed_smc_handler 704 ); 705