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Searched defs:SYSMGR_ECC_DDR0_MASK (Results 1 – 5 of 5) sorted by relevance

/arm-trusted-firmware/plat/intel/soc/common/include/
H A Dsocfpga_system_manager.h28 #define SYSMGR_ECC_DDR0_MASK BIT(16) macro
/arm-trusted-firmware/plat/intel/soc/agilex5/include/
H A Dagilex5_system_manager.h181 #define SYSMGR_ECC_DDR0_MASK BIT(16) macro
/arm-trusted-firmware/plat/intel/soc/n5x/include/
H A Dn5x_system_manager.h181 #define SYSMGR_ECC_DDR0_MASK BIT(16) macro
/arm-trusted-firmware/plat/intel/soc/stratix10/include/
H A Ds10_system_manager.h177 #define SYSMGR_ECC_DDR0_MASK BIT(16) macro
/arm-trusted-firmware/plat/intel/soc/agilex/include/
H A Dagilex_system_manager.h178 #define SYSMGR_ECC_DDR0_MASK BIT(16) macro