Lines Matching defs:ret
279 int ret;
284 ret = validate_flags(flags, mpidr);
285 if (ret != 0)
286 return ret;
302 ret = SDEI_EINVAL;
307 ret = SDEI_EDENY;
331 return ret;
341 int ret;
352 ret = validate_flags(flags, mpidr);
353 if (ret != 0)
354 return ret;
473 int ret;
482 ret = SDEI_EDENY;
499 ret = 0;
505 return ret;
513 int ret;
522 ret = SDEI_EDENY;
539 ret = 0;
545 return ret;
610 int ret = 0;
635 ret = GET_EV_STATE(se, RUNNING) ? SDEI_EPEND : SDEI_EDENY;
671 ret = SDEI_EPEND;
676 return ret;
778 int ret = 0;
796 ret = SDEI_EDENY;
805 ret = SDEI_EDENY;
815 ret = SDEI_EDENY;
829 ret = SDEI_EINVAL;
835 return ret;
842 int ret = 0, final_ret = 0;
852 ret = sdei_event_unregister(map->ev_num);
853 if ((ret == SDEI_EPEND) && (final_ret == 0))
865 int ret = 0, final_ret = 0;
875 ret = sdei_event_unregister(map->ev_num);
876 if ((ret == SDEI_EPEND) && (final_ret == 0))
898 ret = sdei_interrupt_release(map->ev_num);
899 if ((ret != 0) && (final_ret == 0))
900 final_ret = ret;
960 int64_t ret;
975 ret = (int64_t) sdei_version();
976 SDEI_LOG("< VER:%" PRIx64 "\n", ret);
977 SMC_RET1(ctx, ret);
983 ret = sdei_event_register(ev_num, x2, x3, x4, x5);
984 SDEI_LOG("< REG:%" PRId64 "\n", ret);
985 SMC_RET1(ctx, ret);
989 ret = sdei_event_enable(ev_num);
990 SDEI_LOG("< ENABLE:%" PRId64 "\n", ret);
991 SMC_RET1(ctx, ret);
995 ret = sdei_event_disable(ev_num);
996 SDEI_LOG("< DISABLE:%" PRId64 "\n", ret);
997 SMC_RET1(ctx, ret);
1001 ret = sdei_event_context(ctx, (unsigned int) x1);
1002 SDEI_LOG("< CTX:%" PRId64 "\n", ret);
1003 SMC_RET1(ctx, ret);
1012 ret = sdei_event_complete(resume, x1);
1013 SDEI_LOG("< COMPLETE:%" PRIx64 "\n", ret);
1022 if (ret != 0)
1023 SMC_RET1(ctx, ret);
1029 ret = sdei_event_status(ev_num);
1030 SDEI_LOG("< STAT:%" PRId64 "\n", ret);
1031 SMC_RET1(ctx, ret);
1035 ret = sdei_event_get_info(ev_num, (int) x2);
1036 SDEI_LOG("< INFO:%" PRId64 "\n", ret);
1037 SMC_RET1(ctx, ret);
1041 ret = sdei_event_unregister(ev_num);
1042 SDEI_LOG("< UNREG:%" PRId64 "\n", ret);
1043 SMC_RET1(ctx, ret);
1053 ret = sdei_pe_mask();
1054 SDEI_LOG("< MASK:%" PRId64 "\n", ret);
1055 SMC_RET1(ctx, ret);
1059 ret = sdei_interrupt_bind((unsigned int) x1);
1060 SDEI_LOG("< BIND:%" PRId64 "\n", ret);
1061 SMC_RET1(ctx, ret);
1065 ret = sdei_interrupt_release(ev_num);
1066 SDEI_LOG("< REL:%" PRId64 "\n", ret);
1067 SMC_RET1(ctx, ret);
1071 ret = sdei_shared_reset();
1072 SDEI_LOG("< S_RESET:%" PRId64 "\n", ret);
1073 SMC_RET1(ctx, ret);
1077 ret = sdei_private_reset();
1078 SDEI_LOG("< P_RESET:%" PRId64 "\n", ret);
1079 SMC_RET1(ctx, ret);
1083 ret = sdei_event_routing_set(ev_num, x2, x3);
1084 SDEI_LOG("< ROUTE_SET:%" PRId64 "\n", ret);
1085 SMC_RET1(ctx, ret);
1089 ret = (int64_t) sdei_features((unsigned int) x1);
1090 SDEI_LOG("< FTRS:%" PRIx64 "\n", ret);
1091 SMC_RET1(ctx, ret);
1095 ret = sdei_signal(ev_num, x2);
1096 SDEI_LOG("< SIGNAL:%" PRId64 "\n", ret);
1097 SMC_RET1(ctx, ret);